diff options
Diffstat (limited to 'includes/stg/SMP.h')
| -rw-r--r-- | includes/stg/SMP.h | 37 |
1 files changed, 36 insertions, 1 deletions
diff --git a/includes/stg/SMP.h b/includes/stg/SMP.h index 76daddef15..732ac5364b 100644 --- a/includes/stg/SMP.h +++ b/includes/stg/SMP.h @@ -157,6 +157,19 @@ xchg(StgPtr p, StgWord w) : "r" (w), "r" (p) : "memory" ); +#elif aarch64_HOST_ARCH + // Don't think we actually use tmp here, but leaving + // it for consistent numbering + StgWord tmp; + __asm__ __volatile__ ( + "1: ldaxr %0, [%3]\n" + " stlxr %w0, %2, [%3]\n" + " cbnz %w0, 1b\n" + " dmb sy\n" + : "=&r" (result), "=&r" (tmp) + : "r" (w), "r" (p) + : "memory" + ); #else #error xchg() unimplemented on this architecture #endif @@ -232,6 +245,24 @@ cas(StgVolatilePtr p, StgWord o, StgWord n) : "cc","memory"); return result; +#elif aarch64_HOST_ARCH + // Don't think we actually use tmp here, but leaving + // it for consistent numbering + StgWord result,tmp; + + __asm__ __volatile__( + "1: ldxr %1, [%2]\n" + " mov %w0, #0\n" + " cmp %1, %3\n" + " b.ne 2f\n" + " stxr %w0, %4, [%2]\n" + " cbnz %w0, 1b\n" + "2: dmb sy\n" + : "=&r"(tmp), "=&r"(result) + : "r"(p), "r"(o), "r"(n) + : "cc","memory"); + + return result; #else #error cas() unimplemented on this architecture #endif @@ -313,7 +344,7 @@ write_barrier(void) { __asm__ __volatile__ ("" : : : "memory"); #elif arm_HOST_ARCH && defined(arm_HOST_ARCH_PRE_ARMv7) __asm__ __volatile__ ("" : : : "memory"); -#elif arm_HOST_ARCH && !defined(arm_HOST_ARCH_PRE_ARMv7) +#elif (arm_HOST_ARCH && !defined(arm_HOST_ARCH_PRE_ARMv7)) || aarch64_HOST_ARCH __asm__ __volatile__ ("dmb st" : : : "memory"); #else #error memory barriers unimplemented on this architecture @@ -334,6 +365,8 @@ store_load_barrier(void) { __asm__ __volatile__ ("membar #StoreLoad" : : : "memory"); #elif arm_HOST_ARCH && !defined(arm_HOST_ARCH_PRE_ARMv7) __asm__ __volatile__ ("dmb" : : : "memory"); +#elif aarch64_HOST_ARCH + __asm__ __volatile__ ("dmb sy" : : : "memory"); #else #error memory barriers unimplemented on this architecture #endif @@ -354,6 +387,8 @@ load_load_barrier(void) { __asm__ __volatile__ ("" : : : "memory"); #elif arm_HOST_ARCH && !defined(arm_HOST_ARCH_PRE_ARMv7) __asm__ __volatile__ ("dmb" : : : "memory"); +#elif aarch64_HOST_ARCH + __asm__ __volatile__ ("dmb sy" : : : "memory"); #else #error memory barriers unimplemented on this architecture #endif |