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-rw-r--r--ghc/compiler/codeGen/CgRetConv.lhs13
1 files changed, 6 insertions, 7 deletions
diff --git a/ghc/compiler/codeGen/CgRetConv.lhs b/ghc/compiler/codeGen/CgRetConv.lhs
index 77a37f373d..9dc622a2b6 100644
--- a/ghc/compiler/codeGen/CgRetConv.lhs
+++ b/ghc/compiler/codeGen/CgRetConv.lhs
@@ -1,7 +1,7 @@
%
% (c) The GRASP Project, Glasgow University, 1992-1998
%
-% $Id: CgRetConv.lhs,v 1.16 1998/12/18 17:40:52 simonpj Exp $
+% $Id: CgRetConv.lhs,v 1.17 1999/01/18 14:31:51 sof Exp $
%
\section[CgRetConv]{Return conventions for the code generator}
@@ -21,10 +21,9 @@ module CgRetConv (
import AbsCSyn -- quite a few things
import Constants ( mAX_FAMILY_SIZE_FOR_VEC_RETURNS,
mAX_Vanilla_REG, mAX_Float_REG,
- mAX_Double_REG,
+ mAX_Double_REG, mAX_Real_Double_REG,
mAX_Real_Vanilla_REG, mAX_Real_Float_REG,
- mAX_Real_Double_REG,
- mAX_Long_REG
+ mAX_Long_REG, mAX_Real_Long_REG
)
import Maybes ( catMaybes )
import DataCon ( dataConRawArgTys, DataCon )
@@ -182,17 +181,17 @@ We take these register supplies from the *real* registers, i.e. those
that are guaranteed to map to machine registers.
\begin{code}
-vanillaRegNos, floatRegNos, doubleRegNos :: [Int]
+vanillaRegNos, floatRegNos, doubleRegNos, longRegNos :: [Int]
vanillaRegNos = [1 .. mAX_Real_Vanilla_REG]
floatRegNos = [1 .. mAX_Real_Float_REG]
doubleRegNos = [1 .. mAX_Real_Double_REG]
-longRegNos = [1 .. mAX_Long_REG]
+longRegNos = [1 .. mAX_Real_Long_REG]
allVanillaRegNos, allFloatRegNos, allDoubleRegNos, allLongRegNos :: [Int]
allVanillaRegNos = [1 .. mAX_Vanilla_REG]
allFloatRegNos = [1 .. mAX_Float_REG]
allDoubleRegNos = [1 .. mAX_Double_REG]
-allLongRegNos = [1 .. mAX_Double_REG]
+allLongRegNos = [1 .. mAX_Long_REG]
type AvailRegs = ( [Int] -- available vanilla regs.
, [Int] -- floats