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-rw-r--r--compiler/nativeGen/SPARC/CodeGen/CCall.hs19
-rw-r--r--compiler/nativeGen/SPARC/CodeGen/Gen64.hs9
-rw-r--r--compiler/nativeGen/SPARC/Instr.hs42
3 files changed, 40 insertions, 30 deletions
diff --git a/compiler/nativeGen/SPARC/CodeGen/CCall.hs b/compiler/nativeGen/SPARC/CodeGen/CCall.hs
index 7445f7168e..3e629c47f5 100644
--- a/compiler/nativeGen/SPARC/CodeGen/CCall.hs
+++ b/compiler/nativeGen/SPARC/CodeGen/CCall.hs
@@ -24,8 +24,10 @@ import CLabel
import BasicTypes
import OrdList
+import DynFlags
import FastString
import Outputable
+import Platform
{-
Now the biggest nightmare---calls. Most of the nastiness is buried in
@@ -137,6 +139,7 @@ genCCall target dest_regs argsAndHints
let transfer_code
= toOL (move_final vregs allArgRegs extraStackArgsHere)
+ dflags <- getDynFlagsNat
return
$ argcode `appOL`
move_sp_down `appOL`
@@ -144,7 +147,7 @@ genCCall target dest_regs argsAndHints
callinsns `appOL`
unitOL NOP `appOL`
move_sp_up `appOL`
- assign_code dest_regs
+ assign_code (targetPlatform dflags) dest_regs
-- | Generate code to calculate an argument, and move it into one
@@ -224,11 +227,11 @@ move_final (v:vs) (a:az) offset
-- | Assign results returned from the call into their
-- desination regs.
--
-assign_code :: [CmmHinted LocalReg] -> OrdList Instr
+assign_code :: Platform -> [CmmHinted LocalReg] -> OrdList Instr
-assign_code [] = nilOL
+assign_code _ [] = nilOL
-assign_code [CmmHinted dest _hint]
+assign_code platform [CmmHinted dest _hint]
= let rep = localRegType dest
width = typeWidth rep
r_dest = getRegisterReg (CmmLocal dest)
@@ -244,20 +247,20 @@ assign_code [CmmHinted dest _hint]
| not $ isFloatType rep
, W32 <- width
- = unitOL $ mkRegRegMoveInstr (regSingle $ oReg 0) r_dest
+ = unitOL $ mkRegRegMoveInstr platform (regSingle $ oReg 0) r_dest
| not $ isFloatType rep
, W64 <- width
, r_dest_hi <- getHiVRegFromLo r_dest
- = toOL [ mkRegRegMoveInstr (regSingle $ oReg 0) r_dest_hi
- , mkRegRegMoveInstr (regSingle $ oReg 1) r_dest]
+ = toOL [ mkRegRegMoveInstr platform (regSingle $ oReg 0) r_dest_hi
+ , mkRegRegMoveInstr platform (regSingle $ oReg 1) r_dest]
| otherwise
= panic "SPARC.CodeGen.GenCCall: no match"
in result
-assign_code _
+assign_code _ _
= panic "SPARC.CodeGen.GenCCall: no match"
diff --git a/compiler/nativeGen/SPARC/CodeGen/Gen64.hs b/compiler/nativeGen/SPARC/CodeGen/Gen64.hs
index 180ec315ee..6bf2a8f32d 100644
--- a/compiler/nativeGen/SPARC/CodeGen/Gen64.hs
+++ b/compiler/nativeGen/SPARC/CodeGen/Gen64.hs
@@ -23,6 +23,7 @@ import Reg
import OldCmm
+import DynFlags
import OrdList
import Outputable
@@ -182,10 +183,12 @@ iselExpr64 (CmmMachOp (MO_UU_Conv _ W64) [expr])
-- compute expr and load it into r_dst_lo
(a_reg, a_code) <- getSomeReg expr
- let code = a_code
+ dflags <- getDynFlagsNat
+ let platform = targetPlatform dflags
+ code = a_code
`appOL` toOL
- [ mkRegRegMoveInstr g0 r_dst_hi -- clear high 32 bits
- , mkRegRegMoveInstr a_reg r_dst_lo ]
+ [ mkRegRegMoveInstr platform g0 r_dst_hi -- clear high 32 bits
+ , mkRegRegMoveInstr platform a_reg r_dst_lo ]
return $ ChildCode64 code r_dst_lo
diff --git a/compiler/nativeGen/SPARC/Instr.hs b/compiler/nativeGen/SPARC/Instr.hs
index 816af9ba2a..61090e05c8 100644
--- a/compiler/nativeGen/SPARC/Instr.hs
+++ b/compiler/nativeGen/SPARC/Instr.hs
@@ -43,6 +43,7 @@ import OldCmm
import FastString
import FastBool
import Outputable
+import Platform
-- | Register or immediate
@@ -363,15 +364,16 @@ sparc_patchJumpInstr insn patchF
-- | Make a spill instruction.
-- On SPARC we spill below frame pointer leaving 2 words/spill
sparc_mkSpillInstr
- :: Reg -- ^ register to spill
- -> Int -- ^ current stack delta
- -> Int -- ^ spill slot to use
- -> Instr
+ :: Platform
+ -> Reg -- ^ register to spill
+ -> Int -- ^ current stack delta
+ -> Int -- ^ spill slot to use
+ -> Instr
-sparc_mkSpillInstr reg _ slot
+sparc_mkSpillInstr platform reg _ slot
= let off = spillSlotToOffset slot
off_w = 1 + (off `div` 4)
- sz = case targetClassOfReg reg of
+ sz = case targetClassOfReg platform reg of
RcInteger -> II32
RcFloat -> FF32
RcDouble -> FF64
@@ -382,15 +384,16 @@ sparc_mkSpillInstr reg _ slot
-- | Make a spill reload instruction.
sparc_mkLoadInstr
- :: Reg -- ^ register to load into
- -> Int -- ^ current stack delta
- -> Int -- ^ spill slot to use
- -> Instr
+ :: Platform
+ -> Reg -- ^ register to load into
+ -> Int -- ^ current stack delta
+ -> Int -- ^ spill slot to use
+ -> Instr
-sparc_mkLoadInstr reg _ slot
+sparc_mkLoadInstr platform reg _ slot
= let off = spillSlotToOffset slot
off_w = 1 + (off `div` 4)
- sz = case targetClassOfReg reg of
+ sz = case targetClassOfReg platform reg of
RcInteger -> II32
RcFloat -> FF32
RcDouble -> FF64
@@ -430,13 +433,14 @@ sparc_isMetaInstr instr
-- have to go via memory.
--
sparc_mkRegRegMoveInstr
- :: Reg
- -> Reg
- -> Instr
-
-sparc_mkRegRegMoveInstr src dst
- | srcClass <- targetClassOfReg src
- , dstClass <- targetClassOfReg dst
+ :: Platform
+ -> Reg
+ -> Reg
+ -> Instr
+
+sparc_mkRegRegMoveInstr platform src dst
+ | srcClass <- targetClassOfReg platform src
+ , dstClass <- targetClassOfReg platform dst
, srcClass == dstClass
= case srcClass of
RcInteger -> ADD False False src (RIReg g0) dst