diff options
Diffstat (limited to 'compiler/nativeGen/RegAlloc/Liveness.hs')
| -rw-r--r-- | compiler/nativeGen/RegAlloc/Liveness.hs | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/compiler/nativeGen/RegAlloc/Liveness.hs b/compiler/nativeGen/RegAlloc/Liveness.hs index e66139786b..9d93564317 100644 --- a/compiler/nativeGen/RegAlloc/Liveness.hs +++ b/compiler/nativeGen/RegAlloc/Liveness.hs @@ -35,6 +35,8 @@ module RegAlloc.Liveness ( regLiveness, natCmmTopToLive ) where +import GhcPrelude + import Reg import Instruction @@ -145,10 +147,10 @@ instance Instruction instr => Instruction (InstrSR instr) where mkJumpInstr target = map Instr (mkJumpInstr target) mkStackAllocInstr platform amount = - Instr (mkStackAllocInstr platform amount) + Instr <$> mkStackAllocInstr platform amount mkStackDeallocInstr platform amount = - Instr (mkStackDeallocInstr platform amount) + Instr <$> mkStackDeallocInstr platform amount -- | An instruction with liveness information. @@ -812,7 +814,7 @@ computeLiveness computeLiveness platform sccs = case checkIsReverseDependent sccs of Nothing -> livenessSCCs platform mapEmpty [] sccs - Just bad -> pprPanic "RegAlloc.Liveness.computeLivenss" + Just bad -> pprPanic "RegAlloc.Liveness.computeLiveness" (vcat [ text "SCCs aren't in reverse dependent order" , text "bad blockId" <+> ppr bad , ppr sccs]) @@ -1006,5 +1008,3 @@ liveness1 platform liveregs blockmap (LiveInstr instr _) r_dying_br = nonDetEltsUniqSet (mkUniqSet r_dying `unionUniqSets` live_branch_only) -- See Note [Unique Determinism and code generation] - - |