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-rw-r--r--compiler/nativeGen/AsmCodeGen.lhs2
-rw-r--r--compiler/nativeGen/RegAlloc/Graph/Main.hs4
-rw-r--r--compiler/nativeGen/RegAlloc/Graph/SpillCost.hs6
-rw-r--r--compiler/nativeGen/RegAlloc/Liveness.hs9
4 files changed, 9 insertions, 12 deletions
diff --git a/compiler/nativeGen/AsmCodeGen.lhs b/compiler/nativeGen/AsmCodeGen.lhs
index 0574e9246c..15dd2dc90a 100644
--- a/compiler/nativeGen/AsmCodeGen.lhs
+++ b/compiler/nativeGen/AsmCodeGen.lhs
@@ -375,7 +375,7 @@ cmmNativeGen dflags ncgImpl us cmm count
let (withLiveness, usLive) =
{-# SCC "regLiveness" #-}
initUs usGen
- $ mapUs (regLiveness platform)
+ $ mapUs regLiveness
$ map natCmmTopToLive native
dumpIfSet_dyn dflags
diff --git a/compiler/nativeGen/RegAlloc/Graph/Main.hs b/compiler/nativeGen/RegAlloc/Graph/Main.hs
index 4e359a1c79..bae3de8f16 100644
--- a/compiler/nativeGen/RegAlloc/Graph/Main.hs
+++ b/compiler/nativeGen/RegAlloc/Graph/Main.hs
@@ -120,7 +120,7 @@ regAlloc_spin dflags spinCount triv regsFree slotsFree debug_codeGraphs code
-- build a map of the cost of spilling each instruction
-- this will only actually be computed if we have to spill something.
let spillCosts = foldl' plusSpillCostInfo zeroSpillCostInfo
- $ map (slurpSpillCostInfo platform) code
+ $ map slurpSpillCostInfo code
-- the function to choose regs to leave uncolored
let spill = chooseSpill spillCosts
@@ -220,7 +220,7 @@ regAlloc_spin dflags spinCount triv regsFree slotsFree debug_codeGraphs code
-- NOTE: we have to reverse the SCCs here to get them back into the reverse-dependency
-- order required by computeLiveness. If they're not in the correct order
-- that function will panic.
- code_relive <- mapM (regLiveness platform . reverseBlocksInTops) code_spilled
+ code_relive <- mapM (regLiveness . reverseBlocksInTops) code_spilled
-- record what happened in this stage for debugging
let stat =
diff --git a/compiler/nativeGen/RegAlloc/Graph/SpillCost.hs b/compiler/nativeGen/RegAlloc/Graph/SpillCost.hs
index c7b41de912..44e1ed7e0f 100644
--- a/compiler/nativeGen/RegAlloc/Graph/SpillCost.hs
+++ b/compiler/nativeGen/RegAlloc/Graph/SpillCost.hs
@@ -36,7 +36,6 @@ import UniqFM
import UniqSet
import Digraph (flattenSCCs)
import Outputable
-import Platform
import State
import Data.List (nub, minimumBy)
@@ -71,11 +70,10 @@ plusSpillCostRecord (r1, a1, b1, c1) (r2, a2, b2, c2)
-- and the number of instructions it was live on entry to (lifetime)
--
slurpSpillCostInfo :: (Outputable instr, Instruction instr)
- => Platform
- -> LiveCmmDecl statics instr
+ => LiveCmmDecl statics instr
-> SpillCostInfo
-slurpSpillCostInfo _ cmm
+slurpSpillCostInfo cmm
= execState (countCmm cmm) zeroSpillCostInfo
where
countCmm CmmData{} = return ()
diff --git a/compiler/nativeGen/RegAlloc/Liveness.hs b/compiler/nativeGen/RegAlloc/Liveness.hs
index 5ff89e811f..88023ec47f 100644
--- a/compiler/nativeGen/RegAlloc/Liveness.hs
+++ b/compiler/nativeGen/RegAlloc/Liveness.hs
@@ -663,20 +663,19 @@ sccBlocks blocks = stronglyConnCompFromEdgedVertices graph
--
regLiveness
:: (Outputable instr, Instruction instr)
- => Platform
- -> LiveCmmDecl statics instr
+ => LiveCmmDecl statics instr
-> UniqSM (LiveCmmDecl statics instr)
-regLiveness _ (CmmData i d)
+regLiveness (CmmData i d)
= returnUs $ CmmData i d
-regLiveness _ (CmmProc info lbl [])
+regLiveness (CmmProc info lbl [])
| LiveInfo static mFirst _ _ <- info
= returnUs $ CmmProc
(LiveInfo static mFirst (Just mapEmpty) Map.empty)
lbl []
-regLiveness _ (CmmProc info lbl sccs)
+regLiveness (CmmProc info lbl sccs)
| LiveInfo static mFirst _ liveSlotsOnEntry <- info
= let (ann_sccs, block_live) = computeLiveness sccs