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| author | Simon Marlow <marlowsd@gmail.com> | 2009-02-11 15:28:44 +0000 |
|---|---|---|
| committer | Simon Marlow <marlowsd@gmail.com> | 2009-02-11 15:28:44 +0000 |
| commit | ff074624e44467e87687b7c96d42cb8a7e047914 (patch) | |
| tree | 06ba38014c18f2a7f573af818a20e0c2e5a7c87c /includes | |
| parent | c83d2d16d72825ea5ef9a1b3c7096fc9e19491b7 (diff) | |
| download | haskell-ff074624e44467e87687b7c96d42cb8a7e047914.tar.gz | |
comment wibbles
Diffstat (limited to 'includes')
| -rw-r--r-- | includes/SMP.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/includes/SMP.h b/includes/SMP.h index 223f1581a3..2cc3fb2009 100644 --- a/includes/SMP.h +++ b/includes/SMP.h @@ -197,7 +197,7 @@ store_load_barrier(void) { #elif powerpc_HOST_ARCH __asm__ __volatile__ ("sync" : : : "memory"); #elif sparc_HOST_ARCH - /* Sparc in TSO mode does not require write/write barriers. */ + /* Sparc in TSO mode does not require store/load barriers. */ __asm__ __volatile__ ("membar" : : : "memory"); #elif !defined(WITHSMP) return; @@ -215,7 +215,7 @@ load_load_barrier(void) { #elif powerpc_HOST_ARCH __asm__ __volatile__ ("lwsync" : : : "memory"); #elif sparc_HOST_ARCH - /* Sparc in TSO mode does not require write/write barriers. */ + /* Sparc in TSO mode does not require load/load barriers. */ __asm__ __volatile__ ("" : : : "memory"); #elif !defined(WITHSMP) return; |