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| author | sewardj <unknown> | 2000-07-11 15:26:33 +0000 |
|---|---|---|
| committer | sewardj <unknown> | 2000-07-11 15:26:33 +0000 |
| commit | 6254fd4ab7c5798599e58b48896c9e284222f26f (patch) | |
| tree | fd91625b8ce835f95fd6ce8bf5a459b044e35e0d /ghc/compiler/nativeGen/MachMisc.lhs | |
| parent | ee7aa7a67308ea2e8f3cca59ef7a7193291059a8 (diff) | |
| download | haskell-6254fd4ab7c5798599e58b48896c9e284222f26f.tar.gz | |
[project @ 2000-07-11 15:26:33 by sewardj]
Fix up the sparc native code generator. Mostly dull stuff. Notable
changes:
* Cleaned up ccall mechanism for sparc somewhat.
* Rearranged assignment of sparc floating point registers (includes/MachRegs.h)
so the NCG's register allocator can handle the double-single pairing
issue without modification. Split VirtualRegF into VirtualRegF and
VirtualRegD, and split RcFloating into RcFloat and RcDouble. Net effect
is that there are now three register classes -- int, float and double,
and we pretend that sparc has some float and some double real regs.
* (A fix for all platforms): propagate MachFloats through as StFloats,
not StDoubles. Amazingly, until now literal floats had been converted
to and treated as doubles, including in ccalls.
Diffstat (limited to 'ghc/compiler/nativeGen/MachMisc.lhs')
| -rw-r--r-- | ghc/compiler/nativeGen/MachMisc.lhs | 23 |
1 files changed, 21 insertions, 2 deletions
diff --git a/ghc/compiler/nativeGen/MachMisc.lhs b/ghc/compiler/nativeGen/MachMisc.lhs index b9c69e7397..0d39e9cd21 100644 --- a/ghc/compiler/nativeGen/MachMisc.lhs +++ b/ghc/compiler/nativeGen/MachMisc.lhs @@ -31,7 +31,7 @@ module MachMisc ( #if i386_TARGET_ARCH #endif #if sparc_TARGET_ARCH - RI(..), riZero + RI(..), riZero, fpRelEA, moveSp, fPair #endif ) where @@ -45,6 +45,9 @@ import Literal ( mkMachInt, Literal(..) ) import MachRegs ( stgReg, callerSaves, RegLoc(..), Imm(..), Reg(..), MachRegsAddr(..) +# if sparc_TARGET_ARCH + ,fp, sp +# endif ) import PrimRep ( PrimRep(..) ) import SMRep ( SMRep(..) ) @@ -52,7 +55,7 @@ import Stix ( StixTree(..), StixReg(..), CodeSegment ) import Panic ( panic ) import Char ( isDigit ) import GlaExts ( word2Int#, int2Word#, shiftRL#, and#, (/=#) ) -import Outputable ( text ) +import Outputable ( text, pprPanic, ppr ) import IOExts ( trace ) \end{code} @@ -639,5 +642,21 @@ riZero (RIImm (ImmInteger 0)) = True riZero (RIReg (RealReg 0)) = True riZero _ = False +-- Calculate the effective address which would be used by the +-- corresponding fpRel sequence. fpRel is in MachRegs.lhs, +-- alas -- can't have fpRelEA here because of module dependencies. +fpRelEA :: Int -> Reg -> Instr +fpRelEA n dst + = ADD False False fp (RIImm (ImmInt (n * BYTES_PER_WORD))) dst + +-- Code to shift the stack pointer by n words. +moveSp :: Int -> Instr +moveSp n + = ADD False False sp (RIImm (ImmInt (n * BYTES_PER_WORD))) sp + +-- Produce the second-half-of-a-double register given the first half. +fPair :: Reg -> Reg +fPair (RealReg n) | n >= 32 && n `mod` 2 == 0 = RealReg (n+1) +fPair other = pprPanic "fPair(sparc NCG)" (ppr other) #endif {- sparc_TARGET_ARCH -} \end{code} |
