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authorIan Lynagh <igloo@earth.li>2011-11-06 18:11:56 +0000
committerIan Lynagh <igloo@earth.li>2011-11-06 18:11:56 +0000
commitd535ef006d85dbdb7cda2b09c5bc35cb80108909 (patch)
tree6cf735f8392afea90b442eccc78b868cec4aab01 /compiler
parentab9e7e37baa71576f9dd8aaff07d10a330e5625d (diff)
downloadhaskell-d535ef006d85dbdb7cda2b09c5bc35cb80108909.tar.gz
Allow the use of R9 and R10 in primops; fixes trac #5423
Diffstat (limited to 'compiler')
-rw-r--r--compiler/codeGen/CgUtils.hs12
-rw-r--r--compiler/codeGen/StgCmmUtils.hs6
-rw-r--r--compiler/nativeGen/PPC/Regs.hs6
-rw-r--r--compiler/nativeGen/SPARC/RegPlate.hs6
-rw-r--r--compiler/nativeGen/X86/Regs.hs6
5 files changed, 36 insertions, 0 deletions
diff --git a/compiler/codeGen/CgUtils.hs b/compiler/codeGen/CgUtils.hs
index 3ee47264e7..a0a5ac2554 100644
--- a/compiler/codeGen/CgUtils.hs
+++ b/compiler/codeGen/CgUtils.hs
@@ -350,6 +350,12 @@ callerSaves (VanillaReg 7 _) = True
#ifdef CALLER_SAVES_R8
callerSaves (VanillaReg 8 _) = True
#endif
+#ifdef CALLER_SAVES_R9
+callerSaves (VanillaReg 9 _) = True
+#endif
+#ifdef CALLER_SAVES_R10
+callerSaves (VanillaReg 10 _) = True
+#endif
#ifdef CALLER_SAVES_F1
callerSaves (FloatReg 1) = True
#endif
@@ -921,6 +927,12 @@ activeStgRegs = [
#ifdef REG_R8
,VanillaReg 8 VGcPtr
#endif
+#ifdef REG_R9
+ ,VanillaReg 9 VGcPtr
+#endif
+#ifdef REG_R10
+ ,VanillaReg 10 VGcPtr
+#endif
#ifdef REG_SpLim
,SpLim
#endif
diff --git a/compiler/codeGen/StgCmmUtils.hs b/compiler/codeGen/StgCmmUtils.hs
index ca0d23a3ac..f209005108 100644
--- a/compiler/codeGen/StgCmmUtils.hs
+++ b/compiler/codeGen/StgCmmUtils.hs
@@ -327,6 +327,12 @@ callerSaves (VanillaReg 7 _) = True
#ifdef CALLER_SAVES_R8
callerSaves (VanillaReg 8 _) = True
#endif
+#ifdef CALLER_SAVES_R9
+callerSaves (VanillaReg 9 _) = True
+#endif
+#ifdef CALLER_SAVES_R10
+callerSaves (VanillaReg 10 _) = True
+#endif
#ifdef CALLER_SAVES_F1
callerSaves (FloatReg 1) = True
#endif
diff --git a/compiler/nativeGen/PPC/Regs.hs b/compiler/nativeGen/PPC/Regs.hs
index 2f1bae39c1..203709e7a3 100644
--- a/compiler/nativeGen/PPC/Regs.hs
+++ b/compiler/nativeGen/PPC/Regs.hs
@@ -472,6 +472,12 @@ freeReg REG_R7 = fastBool False
#ifdef REG_R8
freeReg REG_R8 = fastBool False
#endif
+#ifdef REG_R9
+freeReg REG_R9 = fastBool False
+#endif
+#ifdef REG_R10
+freeReg REG_R10 = fastBool False
+#endif
#ifdef REG_F1
freeReg REG_F1 = fastBool False
#endif
diff --git a/compiler/nativeGen/SPARC/RegPlate.hs b/compiler/nativeGen/SPARC/RegPlate.hs
index 7a7d447757..32d2da187f 100644
--- a/compiler/nativeGen/SPARC/RegPlate.hs
+++ b/compiler/nativeGen/SPARC/RegPlate.hs
@@ -175,6 +175,12 @@ freeReg REG_R7 = fastBool False
#ifdef REG_R8
freeReg REG_R8 = fastBool False
#endif
+#ifdef REG_R9
+freeReg REG_R9 = fastBool False
+#endif
+#ifdef REG_R10
+freeReg REG_R10 = fastBool False
+#endif
#ifdef REG_F1
freeReg REG_F1 = fastBool False
#endif
diff --git a/compiler/nativeGen/X86/Regs.hs b/compiler/nativeGen/X86/Regs.hs
index 59566a7d1a..68ab351e86 100644
--- a/compiler/nativeGen/X86/Regs.hs
+++ b/compiler/nativeGen/X86/Regs.hs
@@ -500,6 +500,12 @@ freeReg REG_R7 = fastBool False
#ifdef REG_R8
freeReg REG_R8 = fastBool False
#endif
+#ifdef REG_R9
+freeReg REG_R9 = fastBool False
+#endif
+#ifdef REG_R10
+freeReg REG_R10 = fastBool False
+#endif
#ifdef REG_F1
freeReg REG_F1 = fastBool False
#endif