Remove PlatformOutputable

We can now get the Platform from the DynFlags inside an SDoc, so we
no longer need to pass the Platform in.

13 files changed, 86 insertions, 99 deletions

diff --git a/compiler/nativeGen/AsmCodeGen.lhs b/compiler/nativeGen/AsmCodeGen.lhs
index 45d0af0ab9..0574e9246c 100644
--- a/compiler/nativeGen/AsmCodeGen.lhs
+++ b/compiler/nativeGen/AsmCodeGen.lhs
@@ -150,7 +150,7 @@ data NcgImpl statics instr jumpDest = NcgImpl {
 nativeCodeGen :: DynFlags -> Handle -> UniqSupply -> [RawCmmGroup] -> IO ()
 nativeCodeGen dflags h us cmms
  = let platform = targetPlatform dflags
-       nCG' :: (PlatformOutputable statics, PlatformOutputable instr, Instruction instr) => NcgImpl statics instr jumpDest -> IO ()
+       nCG' :: (Outputable statics, Outputable instr, Instruction instr) => NcgImpl statics instr jumpDest -> IO ()
        nCG' ncgImpl = nativeCodeGen' dflags ncgImpl h us cmms
        x86NcgImpl = NcgImpl {
                          cmmTopCodeGen             = X86.CodeGen.cmmTopCodeGen
@@ -206,7 +206,7 @@ nativeCodeGen dflags h us cmms
                  ArchUnknown ->
                      panic "nativeCodeGen: No NCG for unknown arch"
 
-nativeCodeGen' :: (PlatformOutputable statics, PlatformOutputable instr, Instruction instr)
+nativeCodeGen' :: (Outputable statics, Outputable instr, Instruction instr)
                => DynFlags
                -> NcgImpl statics instr jumpDest
                -> Handle -> UniqSupply -> [RawCmmGroup] -> IO ()
@@ -274,7 +274,7 @@ nativeCodeGen' dflags ncgImpl h us cmms
 
 -- | Do native code generation on all these cmms.
 --
-cmmNativeGens :: (PlatformOutputable statics, PlatformOutputable instr, Instruction instr)
+cmmNativeGens :: (Outputable statics, Outputable instr, Instruction instr)
               => DynFlags
               -> NcgImpl statics instr jumpDest
               -> BufHandle
@@ -316,7 +316,7 @@ cmmNativeGens dflags ncgImpl h us (cmm : cmms) impAcc profAcc count
         count' <- return $! count + 1;
 
         -- force evaulation all this stuff to avoid space leaks
-        {-# SCC "seqString" #-} seqString (showSDoc dflags $ vcat $ map (pprPlatform platform) imports) `seq` return ()
+        {-# SCC "seqString" #-} seqString (showSDoc dflags $ vcat $ map ppr imports) `seq` return ()
 
         cmmNativeGens dflags ncgImpl
             h us' cmms
@@ -332,7 +332,7 @@ cmmNativeGens dflags ncgImpl h us (cmm : cmms) impAcc profAcc count
 --      Dumping the output of each stage along the way.
 --      Global conflict graph and NGC stats
 cmmNativeGen
-        :: (PlatformOutputable statics, PlatformOutputable instr, Instruction instr)
+        :: (Outputable statics, Outputable instr, Instruction instr)
     => DynFlags
     -> NcgImpl statics instr jumpDest
         -> UniqSupply
@@ -380,7 +380,7 @@ cmmNativeGen dflags ncgImpl us cmm count
 
         dumpIfSet_dyn dflags
                 Opt_D_dump_asm_liveness "Liveness annotations added"
-                (vcat $ map (pprPlatform platform) withLiveness)
+                (vcat $ map ppr withLiveness)
 
         -- allocate registers
         (alloced, usAlloc, ppr_raStatsColor, ppr_raStatsLinear) <-
@@ -414,7 +414,7 @@ cmmNativeGen dflags ncgImpl us cmm count
                         (vcat   $ map (\(stage, stats)
                                         -> text "# --------------------------"
                                         $$ text "#  cmm " <> int count <> text " Stage " <> int stage
-                                        $$ pprPlatform platform stats)
+                                        $$ ppr stats)
                                 $ zip [0..] regAllocStats)
 
                 let mPprStats =
diff --git a/compiler/nativeGen/PPC/Ppr.hs b/compiler/nativeGen/PPC/Ppr.hs
index 6026abcd5e..9f366b9945 100644
--- a/compiler/nativeGen/PPC/Ppr.hs
+++ b/compiler/nativeGen/PPC/Ppr.hs
@@ -134,8 +134,8 @@ pprASCII str
 -- -----------------------------------------------------------------------------
 -- pprInstr: print an 'Instr'
 
-instance PlatformOutputable Instr where
-    pprPlatform platform instr = pprInstr platform instr
+instance Outputable Instr where
+    ppr instr = sdocWithPlatform $ \platform -> pprInstr platform instr
 
 
 pprReg :: Platform -> Reg -> SDoc
diff --git a/compiler/nativeGen/RegAlloc/Graph/Main.hs b/compiler/nativeGen/RegAlloc/Graph/Main.hs
index 0a4dc49881..4e359a1c79 100644
--- a/compiler/nativeGen/RegAlloc/Graph/Main.hs
+++ b/compiler/nativeGen/RegAlloc/Graph/Main.hs
@@ -45,7 +45,7 @@ maxSpinCount    = 10
 
 -- | The top level of the graph coloring register allocator.
 regAlloc
-        :: (PlatformOutputable statics, PlatformOutputable instr, Instruction instr)
+        :: (Outputable statics, Outputable instr, Instruction instr)
         => DynFlags
         -> UniqFM (UniqSet RealReg)     -- ^ the registers we can use for allocation
         -> UniqSet Int                  -- ^ the set of available spill slots.
@@ -73,8 +73,8 @@ regAlloc dflags regsFree slotsFree code
                 , reverse debug_codeGraphs )
 
 regAlloc_spin :: (Instruction instr,
-                  PlatformOutputable instr,
-                  PlatformOutputable statics)
+                  Outputable instr,
+                  Outputable statics)
               => DynFlags
               -> Int
               -> Color.Triv VirtualReg RegClass RealReg
@@ -329,7 +329,7 @@ graphAddCoalesce _ _
 
 -- | Patch registers in code using the reg -> reg mapping in this graph.
 patchRegsFromGraph
-        :: (PlatformOutputable statics, PlatformOutputable instr, Instruction instr)
+        :: (Outputable statics, Outputable instr, Instruction instr)
         => Platform -> Color.Graph VirtualReg RegClass RealReg
         -> LiveCmmDecl statics instr -> LiveCmmDecl statics instr
 
@@ -352,7 +352,7 @@ patchRegsFromGraph platform graph code
                 | otherwise
                 = pprPanic "patchRegsFromGraph: register mapping failed."
                         (  text "There is no node in the graph for register " <> ppr reg
-                        $$ pprPlatform platform code
+                        $$ ppr code
                         $$ Color.dotGraph
                                 (\_ -> text "white")
                                 (trivColorable platform
diff --git a/compiler/nativeGen/RegAlloc/Graph/SpillCost.hs b/compiler/nativeGen/RegAlloc/Graph/SpillCost.hs
index 222e222c75..c7b41de912 100644
--- a/compiler/nativeGen/RegAlloc/Graph/SpillCost.hs
+++ b/compiler/nativeGen/RegAlloc/Graph/SpillCost.hs
@@ -70,12 +70,12 @@ plusSpillCostRecord (r1, a1, b1, c1) (r2, a2, b2, c2)
 --	for each vreg, the number of times it was written to, read from,
 --	and the number of instructions it was live on entry to (lifetime)
 --
-slurpSpillCostInfo :: (PlatformOutputable instr, Instruction instr)
+slurpSpillCostInfo :: (Outputable instr, Instruction instr)
                    => Platform
                    -> LiveCmmDecl statics instr
                    -> SpillCostInfo
 
-slurpSpillCostInfo platform cmm
+slurpSpillCostInfo _ cmm
 	= execState (countCmm cmm) zeroSpillCostInfo
  where
 	countCmm CmmData{}		= return ()
@@ -104,7 +104,7 @@ slurpSpillCostInfo platform cmm
 
 		| otherwise
 		= pprPanic "RegSpillCost.slurpSpillCostInfo"
-			(text "no liveness information on instruction " <> pprPlatform platform instr)
+			(text "no liveness information on instruction " <> ppr instr)
 
 	countLIs rsLiveEntry (LiveInstr instr (Just live) : lis)
 	 = do
diff --git a/compiler/nativeGen/RegAlloc/Graph/Stats.hs b/compiler/nativeGen/RegAlloc/Graph/Stats.hs
index 69be2f0ed6..32970336ad 100644
--- a/compiler/nativeGen/RegAlloc/Graph/Stats.hs
+++ b/compiler/nativeGen/RegAlloc/Graph/Stats.hs
@@ -72,12 +72,12 @@ data RegAllocStats statics instr
 	, raFinal	  :: [NatCmmDecl statics instr] 			-- ^ final code
 	, raSRMs	  :: (Int, Int, Int) }				-- ^ spill\/reload\/reg-reg moves present in this code
 
-instance (PlatformOutputable statics, PlatformOutputable instr) => PlatformOutputable (RegAllocStats statics instr) where
+instance (Outputable statics, Outputable instr) => Outputable (RegAllocStats statics instr) where
 
- pprPlatform platform (s@RegAllocStatsStart{})
- 	=  text "#  Start"
+ ppr (s@RegAllocStatsStart{}) = sdocWithPlatform $ \platform ->
+ 	   text "#  Start"
 	$$ text "#  Native code with liveness information."
-	$$ pprPlatform platform (raLiveCmm s)
+	$$ ppr (raLiveCmm s)
 	$$ text ""
 	$$ text "#  Initial register conflict graph."
 	$$ Color.dotGraph 
@@ -88,11 +88,11 @@ instance (PlatformOutputable statics, PlatformOutputable instr) => PlatformOutpu
 		(raGraph s)
 
 
- pprPlatform platform (s@RegAllocStatsSpill{})
- 	=  text "#  Spill"
+ ppr (s@RegAllocStatsSpill{}) =
+ 	   text "#  Spill"
 
 	$$ text "#  Code with liveness information."
-	$$ pprPlatform platform (raCode s)
+	$$ ppr (raCode s)
 	$$ text ""
 
 	$$ (if (not $ isNullUFM $ raCoalesced s)
@@ -106,14 +106,14 @@ instance (PlatformOutputable statics, PlatformOutputable instr) => PlatformOutpu
 	$$ text ""
 
 	$$ text "#  Code with spills inserted."
-	$$ pprPlatform platform (raSpilled s)
+	$$ ppr (raSpilled s)
 
 
- pprPlatform platform (s@RegAllocStatsColored { raSRMs = (spills, reloads, moves) })
- 	=  text "#  Colored"
+ ppr (s@RegAllocStatsColored { raSRMs = (spills, reloads, moves) }) = sdocWithPlatform $ \platform ->
+ 	   text "#  Colored"
 
 	$$ text "#  Code with liveness information."
-	$$ pprPlatform platform (raCode s)
+	$$ ppr (raCode s)
 	$$ text ""
 
 	$$ text "#  Register conflict graph (colored)."
@@ -132,19 +132,19 @@ instance (PlatformOutputable statics, PlatformOutputable instr) => PlatformOutpu
 		else empty)
 
 	$$ text "#  Native code after coalescings applied."
-	$$ pprPlatform platform (raCodeCoalesced s)
+	$$ ppr (raCodeCoalesced s)
 	$$ text ""
 
 	$$ text "#  Native code after register allocation."
-	$$ pprPlatform platform (raPatched s)
+	$$ ppr (raPatched s)
 	$$ text ""
 
 	$$ text "#  Clean out unneeded spill/reloads."
-	$$ pprPlatform platform (raSpillClean s)
+	$$ ppr (raSpillClean s)
 	$$ text ""
 
 	$$ text "#  Final code, after rewriting spill/rewrite pseudo instrs."
-	$$ pprPlatform platform (raFinal s)
+	$$ ppr (raFinal s)
 	$$ text ""
 	$$  text "#  Score:"
 	$$ (text "#          spills  inserted: " <> int spills)
diff --git a/compiler/nativeGen/RegAlloc/Linear/Main.hs b/compiler/nativeGen/RegAlloc/Linear/Main.hs
index 64b0f68eda..8c38fd1de6 100644
--- a/compiler/nativeGen/RegAlloc/Linear/Main.hs
+++ b/compiler/nativeGen/RegAlloc/Linear/Main.hs
@@ -127,7 +127,7 @@ import Control.Monad
 
 -- Allocate registers
 regAlloc
-        :: (PlatformOutputable instr, Instruction instr)
+        :: (Outputable instr, Instruction instr)
         => DynFlags
         -> LiveCmmDecl statics instr
         -> UniqSM (NatCmmDecl statics instr, Maybe RegAllocStats)
@@ -170,7 +170,7 @@ regAlloc _ (CmmProc _ _ _)
 --   an entry in the block map or it is the first block.
 --
 linearRegAlloc
-        :: (PlatformOutputable instr, Instruction instr)
+        :: (Outputable instr, Instruction instr)
         => DynFlags
         -> BlockId                      -- ^ the first block
         -> BlockMap RegSet              -- ^ live regs on entry to each basic block
@@ -189,7 +189,7 @@ linearRegAlloc dflags first_id block_live sccs
       ArchUnknown   -> panic "linearRegAlloc ArchUnknown"
 
 linearRegAlloc'
-        :: (FR freeRegs, PlatformOutputable instr, Instruction instr)
+        :: (FR freeRegs, Outputable instr, Instruction instr)
         => Platform
         -> freeRegs
         -> BlockId                      -- ^ the first block
@@ -205,7 +205,7 @@ linearRegAlloc' platform initFreeRegs first_id block_live sccs
         return  (blocks, stats)
 
 
-linearRA_SCCs :: (FR freeRegs, Instruction instr, PlatformOutputable instr)
+linearRA_SCCs :: (FR freeRegs, Instruction instr, Outputable instr)
               => Platform
               -> BlockId
               -> BlockMap RegSet
@@ -241,7 +241,7 @@ linearRA_SCCs platform first_id block_live blocksAcc (CyclicSCC blocks : sccs)
    more sanity checking to guard against this eventuality.
 -}
 
-process :: (FR freeRegs, Instruction instr, PlatformOutputable instr)
+process :: (FR freeRegs, Instruction instr, Outputable instr)
         => Platform
         -> BlockId
         -> BlockMap RegSet
@@ -286,7 +286,7 @@ process platform first_id block_live (b@(BasicBlock id _) : blocks)
 -- | Do register allocation on this basic block
 --
 processBlock
-        :: (FR freeRegs, PlatformOutputable instr, Instruction instr)
+        :: (FR freeRegs, Outputable instr, Instruction instr)
         => Platform
         -> BlockMap RegSet              -- ^ live regs on entry to each basic block
         -> LiveBasicBlock instr         -- ^ block to do register allocation on
@@ -321,7 +321,7 @@ initBlock id
 
 -- | Do allocation for a sequence of instructions.
 linearRA
-        :: (FR freeRegs, PlatformOutputable instr, Instruction instr)
+        :: (FR freeRegs, Outputable instr, Instruction instr)
         => Platform
         -> BlockMap RegSet                      -- ^ map of what vregs are live on entry to each block.
         -> [instr]                              -- ^ accumulator for instructions already processed.
@@ -350,7 +350,7 @@ linearRA platform block_live accInstr accFixups id (instr:instrs)
 
 -- | Do allocation for a single instruction.
 raInsn
-        :: (FR freeRegs, PlatformOutputable instr, Instruction instr)
+        :: (FR freeRegs, Outputable instr, Instruction instr)
         => Platform
         -> BlockMap RegSet                      -- ^ map of what vregs are love on entry to each block.
         -> [instr]                              -- ^ accumulator for instructions already processed.
@@ -410,11 +410,11 @@ raInsn platform block_live new_instrs id (LiveInstr (Instr instr) (Just live))
                         (uniqSetToList $ liveDieWrite live)
 
 
-raInsn platform _ _ _ instr
-        = pprPanic "raInsn" (text "no match for:" <> pprPlatform platform instr)
+raInsn _ _ _ _ instr
+        = pprPanic "raInsn" (text "no match for:" <> ppr instr)
 
 
-genRaInsn :: (FR freeRegs, Instruction instr, PlatformOutputable instr)
+genRaInsn :: (FR freeRegs, Instruction instr, Outputable instr)
           => Platform
           -> BlockMap RegSet
           -> [instr]
@@ -554,7 +554,7 @@ releaseRegs regs = do
 
 
 saveClobberedTemps
-        :: (PlatformOutputable instr, Instruction instr)
+        :: (Outputable instr, Instruction instr)
         => Platform
         -> [RealReg]            -- real registers clobbered by this instruction
         -> [Reg]                -- registers which are no longer live after this insn
@@ -647,7 +647,7 @@ data SpillLoc = ReadMem StackSlot  -- reading from register only in memory
 --   the list of free registers and free stack slots.
 
 allocateRegsAndSpill
-        :: (FR freeRegs, PlatformOutputable instr, Instruction instr)
+        :: (FR freeRegs, Outputable instr, Instruction instr)
         => Platform
         -> Bool                 -- True <=> reading (load up spilled regs)
         -> [VirtualReg]         -- don't push these out
@@ -692,7 +692,7 @@ allocateRegsAndSpill platform reading keep spills alloc (r:rs)
 
 -- reading is redundant with reason, but we keep it around because it's
 -- convenient and it maintains the recursive structure of the allocator. -- EZY
-allocRegsAndSpill_spill :: (FR freeRegs, Instruction instr, PlatformOutputable instr)
+allocRegsAndSpill_spill :: (FR freeRegs, Instruction instr, Outputable instr)
                         => Platform
                         -> Bool
                         -> [VirtualReg]
@@ -798,7 +798,7 @@ newLocation _ my_reg = InReg my_reg
 
 -- | Load up a spilled temporary if we need to (read from memory).
 loadTemp
-        :: (PlatformOutputable instr, Instruction instr)
+        :: (Outputable instr, Instruction instr)
         => Platform
         -> VirtualReg   -- the temp being loaded
         -> SpillLoc     -- the current location of this temp
diff --git a/compiler/nativeGen/RegAlloc/Liveness.hs b/compiler/nativeGen/RegAlloc/Liveness.hs
index 0212e8cb16..5ff89e811f 100644
--- a/compiler/nativeGen/RegAlloc/Liveness.hs
+++ b/compiler/nativeGen/RegAlloc/Liveness.hs
@@ -171,13 +171,13 @@ type LiveBasicBlock instr
         = GenBasicBlock (LiveInstr instr)
 
 
-instance PlatformOutputable instr
-      => PlatformOutputable (InstrSR instr) where
+instance Outputable instr
+      => Outputable (InstrSR instr) where
 
-        pprPlatform platform (Instr realInstr)
-           = pprPlatform platform realInstr
+        ppr (Instr realInstr)
+           = ppr realInstr
 
-        pprPlatform _ (SPILL reg slot)
+        ppr (SPILL reg slot)
            = hcat [
                 ptext (sLit "\tSPILL"),
                 char ' ',
@@ -185,7 +185,7 @@ instance PlatformOutputable instr
                 comma,
                 ptext (sLit "SLOT") <> parens (int slot)]
 
-        pprPlatform _ (RELOAD slot reg)
+        ppr (RELOAD slot reg)
            = hcat [
                 ptext (sLit "\tRELOAD"),
                 char ' ',
@@ -193,14 +193,14 @@ instance PlatformOutputable instr
                 comma,
                 ppr reg]
 
-instance PlatformOutputable instr
-      => PlatformOutputable (LiveInstr instr) where
+instance Outputable instr
+      => Outputable (LiveInstr instr) where
 
-        pprPlatform platform (LiveInstr instr Nothing)
-         = pprPlatform platform instr
+        ppr (LiveInstr instr Nothing)
+         = ppr instr
 
-        pprPlatform platform (LiveInstr instr (Just live))
-         =  pprPlatform platform instr
+        ppr (LiveInstr instr (Just live))
+         =  ppr instr
                 $$ (nest 8
                         $ vcat
                         [ pprRegs (ptext (sLit "# born:    ")) (liveBorn live)
@@ -213,9 +213,9 @@ instance PlatformOutputable instr
                  | isEmptyUniqSet regs  = empty
                  | otherwise            = name <> (hcat $ punctuate space $ map ppr $ uniqSetToList regs)
 
-instance PlatformOutputable LiveInfo where
-    pprPlatform platform (LiveInfo mb_static firstId liveVRegsOnEntry liveSlotsOnEntry)
-        =  (maybe empty (pprPlatform platform) mb_static)
+instance Outputable LiveInfo where
+    ppr (LiveInfo mb_static firstId liveVRegsOnEntry liveSlotsOnEntry)
+        =  (maybe empty (ppr) mb_static)
         $$ text "# firstId          = " <> ppr firstId
         $$ text "# liveVRegsOnEntry = " <> ppr liveVRegsOnEntry
         $$ text "# liveSlotsOnEntry = " <> text (show liveSlotsOnEntry)
@@ -460,9 +460,7 @@ slurpReloadCoalesce live
 
 -- | Strip away liveness information, yielding NatCmmDecl
 stripLive
-        :: (PlatformOutputable statics,
-            PlatformOutputable instr,
-            Instruction instr)
+        :: (Outputable statics, Outputable instr, Instruction instr)
         => Platform
         -> LiveCmmDecl statics instr
         -> NatCmmDecl statics instr
@@ -470,9 +468,7 @@ stripLive
 stripLive platform live
         = stripCmm live
 
- where  stripCmm :: (PlatformOutputable statics,
-                     PlatformOutputable instr,
-                     Instruction instr)
+ where  stripCmm :: (Outputable statics, Outputable instr, Instruction instr)
                  => LiveCmmDecl statics instr -> NatCmmDecl statics instr
         stripCmm (CmmData sec ds)       = CmmData sec ds
         stripCmm (CmmProc (LiveInfo info (Just first_id) _ _) label sccs)
@@ -493,7 +489,7 @@ stripLive platform live
 
         -- If the proc has blocks but we don't know what the first one was, then we're dead.
         stripCmm proc
-                 = pprPanic "RegAlloc.Liveness.stripLive: no first_id on proc" (pprPlatform platform proc)
+                 = pprPanic "RegAlloc.Liveness.stripLive: no first_id on proc" (ppr proc)
 
 -- | Strip away liveness information from a basic block,
 --   and make real spill instructions out of SPILL, RELOAD pseudos along the way.
@@ -666,7 +662,7 @@ sccBlocks blocks = stronglyConnCompFromEdgedVertices graph
 -- Annotate code with register liveness information
 --
 regLiveness
-        :: (PlatformOutputable instr, Instruction instr)
+        :: (Outputable instr, Instruction instr)
         => Platform
         -> LiveCmmDecl statics instr
         -> UniqSM (LiveCmmDecl statics instr)
@@ -680,9 +676,9 @@ regLiveness _ (CmmProc info lbl [])
                         (LiveInfo static mFirst (Just mapEmpty) Map.empty)
                         lbl []
 
-regLiveness platform (CmmProc info lbl sccs)
+regLiveness _ (CmmProc info lbl sccs)
         | LiveInfo static mFirst _ liveSlotsOnEntry     <- info
-        = let   (ann_sccs, block_live)  = computeLiveness platform sccs
+        = let   (ann_sccs, block_live)  = computeLiveness sccs
 
           in    returnUs $ CmmProc (LiveInfo static mFirst (Just block_live) liveSlotsOnEntry)
                            lbl ann_sccs
@@ -746,21 +742,20 @@ reverseBlocksInTops top
 --  want for the next pass.
 --
 computeLiveness
-        :: (PlatformOutputable instr, Instruction instr)
-        => Platform
-        -> [SCC (LiveBasicBlock instr)]
+        :: (Outputable instr, Instruction instr)
+        => [SCC (LiveBasicBlock instr)]
         -> ([SCC (LiveBasicBlock instr)],       -- instructions annotated with list of registers
                                                 -- which are "dead after this instruction".
                BlockMap RegSet)                 -- blocks annontated with set of live registers
                                                 -- on entry to the block.
 
-computeLiveness platform sccs
+computeLiveness sccs
  = case checkIsReverseDependent sccs of
         Nothing         -> livenessSCCs emptyBlockMap [] sccs
         Just bad        -> pprPanic "RegAlloc.Liveness.computeLivenss"
                                 (vcat   [ text "SCCs aren't in reverse dependent order"
                                         , text "bad blockId" <+> ppr bad
-                                        , pprPlatform platform sccs])
+                                        , ppr sccs])
 
 livenessSCCs
        :: Instruction instr
diff --git a/compiler/nativeGen/SPARC/CodeGen/CondCode.hs b/compiler/nativeGen/SPARC/CodeGen/CondCode.hs
index f02b7a45a8..74f20196df 100644
--- a/compiler/nativeGen/SPARC/CodeGen/CondCode.hs
+++ b/compiler/nativeGen/SPARC/CodeGen/CondCode.hs
@@ -26,7 +26,6 @@ import Size
 
 import OldCmm
 
-import DynFlags
 import OrdList
 import Outputable
 
@@ -62,11 +61,9 @@ getCondCode (CmmMachOp mop [x, y])
       MO_U_Lt _   -> condIntCode LU   x y
       MO_U_Le _   -> condIntCode LEU  x y
 
-      _           -> do dflags <- getDynFlags
-                        pprPanic "SPARC.CodeGen.CondCode.getCondCode" (pprPlatform (targetPlatform dflags) (CmmMachOp mop [x,y]))
+      _           -> pprPanic "SPARC.CodeGen.CondCode.getCondCode" (ppr (CmmMachOp mop [x,y]))
 
-getCondCode other = do dflags <- getDynFlags
-                       pprPanic "SPARC.CodeGen.CondCode.getCondCode" (pprPlatform (targetPlatform dflags) other)
+getCondCode other = pprPanic "SPARC.CodeGen.CondCode.getCondCode" (ppr other)
 
 
 
diff --git a/compiler/nativeGen/SPARC/CodeGen/Gen64.hs b/compiler/nativeGen/SPARC/CodeGen/Gen64.hs
index 5352281296..654875c497 100644
--- a/compiler/nativeGen/SPARC/CodeGen/Gen64.hs
+++ b/compiler/nativeGen/SPARC/CodeGen/Gen64.hs
@@ -201,8 +201,7 @@ iselExpr64 (CmmMachOp (MO_UU_Conv _ W64) [expr])
 
 
 iselExpr64 expr
-   = do dflags <- getDynFlags
-        pprPanic "iselExpr64(sparc)" (pprPlatform (targetPlatform dflags) expr)
+   = pprPanic "iselExpr64(sparc)" (ppr expr)
 
 
 
diff --git a/compiler/nativeGen/SPARC/CodeGen/Sanity.hs b/compiler/nativeGen/SPARC/CodeGen/Sanity.hs
index 78dbb1b493..3eea016124 100644
--- a/compiler/nativeGen/SPARC/CodeGen/Sanity.hs
+++ b/compiler/nativeGen/SPARC/CodeGen/Sanity.hs
@@ -32,7 +32,7 @@ checkBlock :: Platform
            -> NatBasicBlock Instr
            -> NatBasicBlock Instr
 
-checkBlock platform cmm block@(BasicBlock _ instrs)
+checkBlock _ cmm block@(BasicBlock _ instrs)
 	| checkBlockInstrs instrs
 	= block
 	
@@ -40,9 +40,9 @@ checkBlock platform cmm block@(BasicBlock _ instrs)
 	= pprPanic 
 		("SPARC.CodeGen: bad block\n")
 		( vcat	[ text " -- cmm -----------------\n"
-			, pprPlatform platform cmm
+			, ppr cmm
 			, text " -- native code ---------\n"
-			, pprPlatform platform block ])
+			, ppr block ])
 
 
 checkBlockInstrs :: [Instr] -> Bool
diff --git a/compiler/nativeGen/SPARC/Ppr.hs b/compiler/nativeGen/SPARC/Ppr.hs
index 4d01b1f48c..7fe1975f9d 100644
--- a/compiler/nativeGen/SPARC/Ppr.hs
+++ b/compiler/nativeGen/SPARC/Ppr.hs
@@ -136,8 +136,8 @@ pprASCII str
 -- -----------------------------------------------------------------------------
 -- pprInstr: print an 'Instr'
 
-instance PlatformOutputable Instr where
-    pprPlatform platform instr = pprInstr platform instr
+instance Outputable Instr where
+    ppr instr = sdocWithPlatform $ \platform -> pprInstr platform instr
 
 
 -- | Pretty print a register.
diff --git a/compiler/nativeGen/X86/CodeGen.hs b/compiler/nativeGen/X86/CodeGen.hs
index 4fa42820ca..68f8adf250 100644
--- a/compiler/nativeGen/X86/CodeGen.hs
+++ b/compiler/nativeGen/X86/CodeGen.hs
@@ -401,8 +401,7 @@ iselExpr64 (CmmMachOp (MO_UU_Conv _ W64) [expr]) = do
             )
 
 iselExpr64 expr
-   = do dflags <- getDynFlags
-        pprPanic "iselExpr64(i386)" (pprPlatform (targetPlatform dflags) expr)
+   = pprPanic "iselExpr64(i386)" (ppr expr)
 
 
 --------------------------------------------------------------------------------
@@ -888,8 +887,7 @@ getRegister' _ (CmmLit lit)
     in
         return (Any size code)
 
-getRegister' _ other = do dflags <- getDynFlags
-                          pprPanic "getRegister(x86)" (pprPlatform (targetPlatform dflags) other)
+getRegister' _ other = pprPanic "getRegister(x86)" (ppr other)
 
 
 intLoadCode :: (Operand -> Operand -> Instr) -> CmmExpr
@@ -1229,11 +1227,9 @@ getCondCode (CmmMachOp mop [x, y])
       MO_U_Lt _ -> condIntCode LU  x y
       MO_U_Le _ -> condIntCode LEU x y
 
-      _other -> do dflags <- getDynFlags
-                   pprPanic "getCondCode(x86,x86_64,sparc)" (pprPlatform (targetPlatform dflags) (CmmMachOp mop [x,y]))
+      _other -> pprPanic "getCondCode(x86,x86_64,sparc)" (ppr (CmmMachOp mop [x,y]))
 
-getCondCode other = do dflags <- getDynFlags
-                       pprPanic "getCondCode(2)(x86,sparc)" (pprPlatform (targetPlatform dflags) other)
+getCondCode other = pprPanic "getCondCode(2)(x86,sparc)" (ppr other)
 
 
 
diff --git a/compiler/nativeGen/X86/Ppr.hs b/compiler/nativeGen/X86/Ppr.hs
index 36593b3229..02f8efddae 100644
--- a/compiler/nativeGen/X86/Ppr.hs
+++ b/compiler/nativeGen/X86/Ppr.hs
@@ -158,8 +158,8 @@ pprAlign platform bytes
 -- -----------------------------------------------------------------------------
 -- pprInstr: print an 'Instr'
 
-instance PlatformOutputable Instr where
-    pprPlatform platform instr = pprInstr platform instr
+instance Outputable Instr where
+    ppr instr = sdocWithPlatform $ \platform -> pprInstr platform instr
 
 
 pprReg :: Platform -> Size -> Reg -> SDoc