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| author | Reid Barton <rwbarton@gmail.com> | 2014-08-11 09:33:13 -0400 |
|---|---|---|
| committer | Reid Barton <rwbarton@gmail.com> | 2014-08-11 09:33:20 -0400 |
| commit | 71bd4e310793b9225767b66f3aa758156816632e (patch) | |
| tree | be863eb6787aa61095877bf4e9b24e6b26e96656 /compiler/nativeGen/X86/CodeGen.hs | |
| parent | 5f5d66298fbb6e50694d189767e69afa10e0dda0 (diff) | |
| download | haskell-71bd4e310793b9225767b66f3aa758156816632e.tar.gz | |
x86: Always generate add instruction in MO_Add2 (#9013)
Test Plan:
- ran validate
- ran T9013 test with all ways
- ran CarryOverflow test with all ways, for good measure
Reviewers: austin, simonmar
Reviewed By: simonmar
Differential Revision: https://phabricator.haskell.org/D137
Diffstat (limited to 'compiler/nativeGen/X86/CodeGen.hs')
| -rw-r--r-- | compiler/nativeGen/X86/CodeGen.hs | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/compiler/nativeGen/X86/CodeGen.hs b/compiler/nativeGen/X86/CodeGen.hs index 04a1820749..d6fdee13f6 100644 --- a/compiler/nativeGen/X86/CodeGen.hs +++ b/compiler/nativeGen/X86/CodeGen.hs @@ -1912,9 +1912,10 @@ genCCall _ is32Bit target dest_regs args = do case args of [arg_x, arg_y] -> do hCode <- getAnyReg (CmmLit (CmmInt 0 width)) - lCode <- getAnyReg (CmmMachOp (MO_Add width) [arg_x, arg_y]) let size = intSize width - reg_l = getRegisterReg platform True (CmmLocal res_l) + lCode <- anyReg =<< trivialCode width (ADD_CC size) + (Just (ADD_CC size)) arg_x arg_y + let reg_l = getRegisterReg platform True (CmmLocal res_l) reg_h = getRegisterReg platform True (CmmLocal res_h) code = hCode reg_h `appOL` lCode reg_l `snocOL` |
