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author | Abhiroop Sarkar <asiamgenius@gmail.com> | 2018-09-27 15:28:46 -0400 |
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committer | Ben Gamari <ben@smart-cactus.org> | 2019-07-01 17:02:29 -0400 |
commit | ff823a08f897e770efda4e89c43618dc6e30bb65 (patch) | |
tree | f26a80bcb060c8439d2daf8cefc9cb367bb3b388 /compiler/nativeGen/SPARC/Regs.hs | |
parent | bd660edeb783a74e5ca3f1f82713b2aeedae19dc (diff) | |
download | haskell-wip/simd.tar.gz |
Add support for SIMD operations in the NCGwip/simd
This adds support for constructing vector types from Float#, Double# etc
and performing arithmetic operations on them
Cleaned-Up-By: Ben Gamari <ben@well-typed.com>
Diffstat (limited to 'compiler/nativeGen/SPARC/Regs.hs')
-rw-r--r-- | compiler/nativeGen/SPARC/Regs.hs | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/compiler/nativeGen/SPARC/Regs.hs b/compiler/nativeGen/SPARC/Regs.hs index 0d7edc346a..e46dbd0d38 100644 --- a/compiler/nativeGen/SPARC/Regs.hs +++ b/compiler/nativeGen/SPARC/Regs.hs @@ -104,7 +104,6 @@ virtualRegSqueeze cls vr VirtualRegD{} -> 1 _other -> 0 - {-# INLINE realRegSqueeze #-} realRegSqueeze :: RegClass -> RealReg -> Int @@ -134,7 +133,6 @@ realRegSqueeze cls rr RealRegPair{} -> 1 - -- | All the allocatable registers in the machine, -- including register pairs. allRealRegs :: [RealReg] |