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| author | Gabor Greif <ggreif@gmail.com> | 2013-04-07 21:36:11 +0200 |
|---|---|---|
| committer | Gabor Greif <ggreif@gmail.com> | 2013-04-07 22:34:26 +0200 |
| commit | 8e02c0a594c6e5dc4208d8247a78bd4ce2d423e5 (patch) | |
| tree | 94df4605ff621a7ef2118d9a6cdd61571647b412 /compiler/nativeGen/RegAlloc/Liveness.hs | |
| parent | a7b08c05a883c350d017ebc9de5bb70b818bcb6a (diff) | |
| download | haskell-8e02c0a594c6e5dc4208d8247a78bd4ce2d423e5.tar.gz | |
Fix typos
Diffstat (limited to 'compiler/nativeGen/RegAlloc/Liveness.hs')
| -rw-r--r-- | compiler/nativeGen/RegAlloc/Liveness.hs | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/compiler/nativeGen/RegAlloc/Liveness.hs b/compiler/nativeGen/RegAlloc/Liveness.hs index f49155e827..41efa18753 100644 --- a/compiler/nativeGen/RegAlloc/Liveness.hs +++ b/compiler/nativeGen/RegAlloc/Liveness.hs @@ -2,7 +2,7 @@ -- -- The register liveness determinator -- --- (c) The University of Glasgow 2004 +-- (c) The University of Glasgow 2004-2013 -- ----------------------------------------------------------------------------- module RegAlloc.Liveness ( @@ -423,7 +423,7 @@ slurpReloadCoalesce live , slotMap' <- addToUFM slotMap slot reg = return (slotMap', Nothing) - -- add an edge betwen the this reg and the last one stored into the slot + -- add an edge between the this reg and the last one stored into the slot | LiveInstr (RELOAD slot reg) _ <- li = case lookupUFM slotMap slot of Just reg2 @@ -594,7 +594,7 @@ patchEraseLive patchF cmm -- source and destination regs are the same | r1 == r2 = True - -- desination reg is never used + -- destination reg is never used | elementOfUniqSet r2 (liveBorn live) , elementOfUniqSet r2 (liveDieRead live) || elementOfUniqSet r2 (liveDieWrite live) = True |