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authorIan Lynagh <ian@well-typed.com>2012-11-13 17:58:52 +0000
committerIan Lynagh <ian@well-typed.com>2012-11-13 18:14:59 +0000
commit9756690fe7aa26aee6955d0b720377d53170c542 (patch)
tree8de7207c87af86c9cab385edb306a22916c381fd /compiler/nativeGen/RegAlloc/Linear/Main.hs
parent958faee6f3069c349a2a60a925679249a6dc9475 (diff)
downloadhaskell-9756690fe7aa26aee6955d0b720377d53170c542.tar.gz
Tell the compiler about alpha, mipseb and mipsel again; fixes #7339
This reverts the compiler parts of commit 7b594a5d7ac29972db39228e9c8b7f384313f39b Author: David Terei <davidterei@gmail.com> Date: Mon Nov 21 12:05:18 2011 -0800 Remove registerised code for dead architectures: mips, ia64, alpha, hppa1, m68k In particular, we want to know whether bewareLoadStoreAlignment should return True or False for them. It also reverts commit 3fc68b5c356b39b2b52a86d953367d0021c13262 Author: Simon Marlow <marlowsd@gmail.com> Date: Wed Jan 4 11:44:02 2012 +0000 Remove missing archs (mipseb, mipsel, alpha) (#5734) It doesn't hurt to map these to ArchUnknown since we don't need to know anything specific about them, and adding them would be a pain (there are a bunch of places where we have to case-match on all the arches to avoid warnings).
Diffstat (limited to 'compiler/nativeGen/RegAlloc/Linear/Main.hs')
-rw-r--r--compiler/nativeGen/RegAlloc/Linear/Main.hs3
1 files changed, 3 insertions, 0 deletions
diff --git a/compiler/nativeGen/RegAlloc/Linear/Main.hs b/compiler/nativeGen/RegAlloc/Linear/Main.hs
index fa71457808..6348b41690 100644
--- a/compiler/nativeGen/RegAlloc/Linear/Main.hs
+++ b/compiler/nativeGen/RegAlloc/Linear/Main.hs
@@ -208,6 +208,9 @@ linearRegAlloc dflags first_id block_live sccs
ArchPPC -> linearRegAlloc' dflags (frInitFreeRegs platform :: PPC.FreeRegs) first_id block_live sccs
ArchARM _ _ _ -> panic "linearRegAlloc ArchARM"
ArchPPC_64 -> panic "linearRegAlloc ArchPPC_64"
+ ArchAlpha -> panic "linearRegAlloc ArchAlpha"
+ ArchMipseb -> panic "linearRegAlloc ArchMipseb"
+ ArchMipsel -> panic "linearRegAlloc ArchMipsel"
ArchUnknown -> panic "linearRegAlloc ArchUnknown"
linearRegAlloc'