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| author | Ben Gamari <ben@smart-cactus.org> | 2019-07-09 14:49:32 -0400 |
|---|---|---|
| committer | Marge Bot <ben+marge-bot@smart-cactus.org> | 2019-07-16 02:40:43 -0400 |
| commit | db948daea6c01c073f8d09a79fa5adda279fbf0c (patch) | |
| tree | 50fdb60bdd06a12dab101bf4fca3358fec0ad43d /compiler/nativeGen/RegAlloc/Graph | |
| parent | 5728d9faafe410d1e0c3a070bb8882721470b798 (diff) | |
| download | haskell-db948daea6c01c073f8d09a79fa5adda279fbf0c.tar.gz | |
Revert "Add support for SIMD operations in the NCG"
Unfortunately this will require more work; register allocation is
quite broken.
This reverts commit acd795583625401c5554f8e04ec7efca18814011.
Diffstat (limited to 'compiler/nativeGen/RegAlloc/Graph')
| -rw-r--r-- | compiler/nativeGen/RegAlloc/Graph/TrivColorable.hs | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/compiler/nativeGen/RegAlloc/Graph/TrivColorable.hs b/compiler/nativeGen/RegAlloc/Graph/TrivColorable.hs index 23d7c6b421..5d4fd418c3 100644 --- a/compiler/nativeGen/RegAlloc/Graph/TrivColorable.hs +++ b/compiler/nativeGen/RegAlloc/Graph/TrivColorable.hs @@ -195,6 +195,7 @@ trivColorable platform virtualRegSqueeze realRegSqueeze RcDouble conflicts exclu + -- Specification Code ---------------------------------------------------------- -- -- The trivColorable function for each particular architecture should |