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| author | Ben Gamari <ben@smart-cactus.org> | 2019-07-09 14:49:32 -0400 |
|---|---|---|
| committer | Marge Bot <ben+marge-bot@smart-cactus.org> | 2019-07-16 02:40:43 -0400 |
| commit | db948daea6c01c073f8d09a79fa5adda279fbf0c (patch) | |
| tree | 50fdb60bdd06a12dab101bf4fca3358fec0ad43d /compiler/nativeGen/PPC/CodeGen.hs | |
| parent | 5728d9faafe410d1e0c3a070bb8882721470b798 (diff) | |
| download | haskell-db948daea6c01c073f8d09a79fa5adda279fbf0c.tar.gz | |
Revert "Add support for SIMD operations in the NCG"
Unfortunately this will require more work; register allocation is
quite broken.
This reverts commit acd795583625401c5554f8e04ec7efca18814011.
Diffstat (limited to 'compiler/nativeGen/PPC/CodeGen.hs')
| -rw-r--r-- | compiler/nativeGen/PPC/CodeGen.hs | 6 |
1 files changed, 0 insertions, 6 deletions
diff --git a/compiler/nativeGen/PPC/CodeGen.hs b/compiler/nativeGen/PPC/CodeGen.hs index 7e5df6a76c..a49526c93a 100644 --- a/compiler/nativeGen/PPC/CodeGen.hs +++ b/compiler/nativeGen/PPC/CodeGen.hs @@ -1909,8 +1909,6 @@ genCCall' dflags gcp target dest_regs args FF32 -> (1, 1, 4, fprs) FF64 -> (2, 1, 8, fprs) II64 -> panic "genCCall' passArguments II64" - VecFormat {} - -> panic "genCCall' passArguments vector format" GCP32ELF -> case cmmTypeFormat rep of @@ -1921,8 +1919,6 @@ genCCall' dflags gcp target dest_regs args FF32 -> (0, 1, 4, fprs) FF64 -> (0, 1, 8, fprs) II64 -> panic "genCCall' passArguments II64" - VecFormat {} - -> panic "genCCall' passArguments vector format" GCP64ELF _ -> case cmmTypeFormat rep of II8 -> (1, 0, 8, gprs) @@ -1934,8 +1930,6 @@ genCCall' dflags gcp target dest_regs args -- the FPRs. FF32 -> (1, 1, 8, fprs) FF64 -> (1, 1, 8, fprs) - VecFormat {} - -> panic "genCCall' passArguments vector format" moveResult reduceToFF32 = case dest_regs of |