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authorGeoffrey Mainland <gmainlan@microsoft.com>2012-10-31 15:42:01 +0000
committerGeoffrey Mainland <gmainlan@microsoft.com>2013-02-01 22:00:24 +0000
commit33bfc6a700eaab9bc06974d6f71a80e61d9177c9 (patch)
tree842bf82b7dbdafe04820349e5e991800a3cf0646 /compiler/codeGen/CodeGen
parent1811440833da92eefd7b7255915855fddc64994c (diff)
downloadhaskell-33bfc6a700eaab9bc06974d6f71a80e61d9177c9.tar.gz
Add support for passing SSE vectors in registers.
This patch adds support for 6 XMM registers on x86-64 which overlap with the F and D registers and may hold 128-bit wide SIMD vectors. Because there is not a good way to attach type information to STG registers, we aggressively bitcast in the LLVM back-end.
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