summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorchappedm@gmail.com <chappedm@gmail.com@6b5cf1ce-ec42-a296-1ba9-69fdba395a50>2012-04-21 16:15:20 +0000
committerchappedm@gmail.com <chappedm@gmail.com@6b5cf1ce-ec42-a296-1ba9-69fdba395a50>2012-04-21 16:15:20 +0000
commit9be2f8d802a19ab6e4b2abed3f7cd84780628d16 (patch)
tree2c34e921278db473b493824412626e51aa542bce
parent68df7fa6057a29b3130d41a27592f74d58c2df57 (diff)
downloadgperftools-9be2f8d802a19ab6e4b2abed3f7cd84780628d16.tar.gz
Adding in further support for 64-bit NoBarrier_Load on windows
git-svn-id: http://gperftools.googlecode.com/svn/trunk@148 6b5cf1ce-ec42-a296-1ba9-69fdba395a50
-rw-r--r--src/base/atomicops-internals-windows.h37
1 files changed, 14 insertions, 23 deletions
diff --git a/src/base/atomicops-internals-windows.h b/src/base/atomicops-internals-windows.h
index bd42c82..5c1ae8c 100644
--- a/src/base/atomicops-internals-windows.h
+++ b/src/base/atomicops-internals-windows.h
@@ -434,16 +434,12 @@ inline Atomic64 Barrier_AtomicIncrement(volatile Atomic64* ptr,
#endif
}
-inline void NoBarrier_Store(volatile Atomic64* ptr, Atomic64 value) {
-#if 0 // Not implemented
- __asm {
- mov mm0, value; // Use mmx reg for 64-bit atomic moves
- mov ptr, mm0;
- emms; // Empty mmx state to enable FP registers
- }
-#else
- NotImplementedFatalError("NoBarrier_Store");
-#endif
+inline void NoBarrier_Store(volatile Atomic64* ptrValue, Atomic64 value) {
+ __asm {
+ movq mm0, value; // Use mmx reg for 64-bit atomic moves
+ movq ptrValue, mm0;
+ emms; // Empty mmx state to enable FP registers
+ }
}
inline void Acquire_Store(volatile Atomic64* ptr, Atomic64 value) {
@@ -455,19 +451,14 @@ inline void Release_Store(volatile Atomic64* ptr, Atomic64 value) {
NoBarrier_Store(ptr, value);
}
-inline Atomic64 NoBarrier_Load(volatile const Atomic64* ptr) {
-#if 0 // Not implemented
- Atomic64 value;
- __asm {
- mov mm0, ptr; // Use mmx reg for 64-bit atomic moves
- mov value, mm0;
- emms; // Empty mmx state to enable FP registers
- }
- return value;
-#else
- NotImplementedFatalError("NoBarrier_Store");
- return 0;
-#endif
+inline Atomic64 NoBarrier_Load(volatile const Atomic64* ptrValue) {
+ Atomic64 value;
+ __asm {
+ movq mm0, ptrValue; // Use mmx reg for 64-bit atomic moves
+ movq value, mm0;
+ emms; // Empty mmx state to enable FP registers
+ }
+ return value;
}
inline Atomic64 Acquire_Load(volatile const Atomic64* ptr) {