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| author | Cherry Zhang <cherryyz@google.com> | 2016-05-19 12:33:30 -0400 |
|---|---|---|
| committer | Cherry Zhang <cherryyz@google.com> | 2016-06-02 13:01:44 +0000 |
| commit | 90883091ff5f7170c83f847d6748cf36713e8c9b (patch) | |
| tree | 6b214363424729f5a6cd5c4105615b63bac0570b /src/cmd/compile/internal/ssa/opGen.go | |
| parent | 8756d9253f56f28167543fbd41c15e5695e654b2 (diff) | |
| download | go-git-90883091ff5f7170c83f847d6748cf36713e8c9b.tar.gz | |
[dev.ssa] cmd/compile: clean up hardcoded regmasks in ssa/regalloc.go
Auto-generate register masks and load them through Config.
Passed toolstash -cmp on AMD64.
Tests phi_ssa.go and regalloc_ssa.go in cmd/compile/internal/gc/testdata
passed on ARM.
Updates #15365.
Change-Id: I393924d68067f2dbb13dab82e569fb452c986593
Reviewed-on: https://go-review.googlesource.com/23292
Reviewed-by: David Chase <drchase@google.com>
Diffstat (limited to 'src/cmd/compile/internal/ssa/opGen.go')
| -rw-r--r-- | src/cmd/compile/internal/ssa/opGen.go | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/src/cmd/compile/internal/ssa/opGen.go b/src/cmd/compile/internal/ssa/opGen.go index 1f33c5b3db..89719ebe22 100644 --- a/src/cmd/compile/internal/ssa/opGen.go +++ b/src/cmd/compile/internal/ssa/opGen.go @@ -6442,7 +6442,10 @@ var registersAMD64 = [...]Register{ {32, "SB"}, {33, "FLAGS"}, } +var gpRegMaskAMD64 = regMask(65519) +var fpRegMaskAMD64 = regMask(4294901760) var flagRegMaskAMD64 = regMask(8589934592) +var framepointerRegAMD64 = int8(5) var registersARM = [...]Register{ {0, "R0"}, {1, "R1"}, @@ -6463,4 +6466,7 @@ var registersARM = [...]Register{ {16, "FLAGS"}, {17, "SB"}, } +var gpRegMaskARM = regMask(5119) +var fpRegMaskARM = regMask(0) var flagRegMaskARM = regMask(65536) +var framepointerRegARM = int8(-1) |