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* AC_DEFINE and use HAVE_HOST_CPU_s390_zarch.Torbjorn Granlund2011-10-141-1/+1
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* (s390): Put back an accidentally deleted #else.Torbjorn Granlund2011-10-131-1/+2
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* (s390): Improve umul_ppmm and udiv_qrnnd support.Torbjorn Granlund2011-10-121-6/+51
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* (s390x): Add __CLOBBER_CC for relevant asm patterns.Torbjorn Granlund2011-10-111-7/+9
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* (s390x add_ssaaaa): Remove algsi/slgsi until we support z10.Torbjorn Granlund2011-10-091-27/+5
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* (s390): Put back UDItype casts to make gcc reloading use right more for ↵Torbjorn Granlund2011-10-091-8/+20
| | | | | | constants. (s390 count_leading_zeros): Disable until we support z10 specifically.
* Misc additional s390 changes.Torbjorn Granlund2011-10-071-6/+32
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* (s390): Add 32-bit zarch umul_ppmm and udiv_qrnnd.Torbjorn Granlund2011-10-071-19/+38
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* Add s390/64 support, enhance s390/32 support.Torbjorn Granlund2011-10-041-1/+64
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* (SH): Recognise predefs for all SH processors as defined by current gcc ↵Torbjorn Granlund2011-09-261-1/+1
| | | | versions.
* Undo 2009-03-01 change.Torbjorn Granlund2010-05-051-1/+1
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* Document LONGLONG_STANDALONE and NO_ASM.Torbjorn Granlund2009-08-121-5/+12
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* (arm count_leading_zeros): Define for armv5.Torbjorn Granlund2009-06-111-0/+6
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* (mips, powerpc): Provide assembly-free umul_ppmm for newer gcc.Torbjorn Granlund2009-03-011-5/+45
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* (umul_ppmm) [alpha]: Define using __builtin_alpha_umulh when possible.tege2008-02-271-3/+12
| | | | (count_trailing_zeros): Force destination register mode.
* (sub_ddmmss) [powerpc 64]: Add more variants for constant args.tege2007-09-241-27/+51
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* Update license to version 3.tege2007-09-181-3/+1
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* (umul_ppmm) [mmix]: New.tege2006-11-041-0/+5
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* Update FSF's address.tege2006-02-151-2/+2
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* (many places): Remove lvalue casts.tege2005-05-231-32/+32
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* (add_ssaaaa) [x86]: Remove lvalue casts.tege2005-05-221-4/+4
| | | | (sub_ddmmss) [x86]: Likewise.
* *** empty log message ***tege2005-05-141-1/+1
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* (add_ssaaaa) [x86_64]: Restrict allowed immediate operands.tege2005-05-141-4/+4
| | | | (sub_ddmmss) [x86_64]: Likewise.
* (ia64 umul_ppmm): Add version for icc.tege2004-10-151-0/+9
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* Exclude masquerading __INTEL_COMPILER from ia64 asm.tege2004-10-141-1/+1
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* * longlong.h (count_leading_zeros_gcc_clz,Kevin Ryde2004-04-241-3/+65
| | | | | | count_trailing_zeros_gcc_ctz): New macros. (count_leading_zeros, count_trailing_zeros) [x86]: Use them on gcc 3.4.
* * longlong.h (power, powerpc): Add comments on how we select this code.Kevin Ryde2004-03-201-2/+19
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* * longlong.h (count_leading_zeros) [alpha gcc]: New version, inliningKevin Ryde2004-02-281-6/+33
| | | | mpn/alpha/cntlz.asm cmpbge technique.
* * longlong.h (power, powerpc): Use HAVE_HOST_CPU_FAMILY_power andKevin Ryde2004-02-111-14/+8
| | | | HAVE_HOST_CPU_FAMILY_powerpc rather than various cpp defines.
* * longlong.h (sub_ddmmss) [ia64]: New macro.Kevin Ryde2004-01-101-0/+14
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* * longlong.h (sub_ddmmss) [generic]: Use al<bl for the borrow ratherKevin Ryde2004-01-101-3/+3
| | | | | than __x>al, since the former can be done without waiting for __x, helping superscalar chips, in particular alpha ev5 and ev6.
* * longlong.h (umul_ppmm) [generic]: Add comments about squaringKevin Ryde2004-01-021-1/+10
| | | | (dropped from tasks list)
* Bit more of:Kevin Ryde2003-11-061-2/+2
| | | | | | * gmp-impl.h (HAVE_HOST_CPU_alpha_CIX): New define. (ULONG_PARITY, popc_limb): Use it, to pick up ev7 as well as 67 and 68. * longlong.h (count_leading_zeros, count_trailing_zeros): Ditto.
* * gmp-impl.h (HAVE_HOST_CPU_alpha_CIX): New define.Kevin Ryde2003-11-061-2/+2
| | | | | (ULONG_PARITY, popc_limb): Use it, to pick up ev7 as well as 67 and 68. * longlong.h (count_leading_zeros, count_trailing_zeros): Ditto.
* (AMD64): __x86_64__ => __amd64__.tege2003-10-191-1/+3
| | | | (64-bit powerpc): Only define carry-dependent macros if !_LONG_LONG_LIMB.
* Amend comments associated with:Kevin Ryde2003-08-191-4/+3
| | | | | * longlong.h (count_trailing_zeros) [x86_64]: Use "%q0" to force 64-bit register destination. Pointed out by Torbjorn.
* * longlong.h (add_ssaaaa, sub_ddmmss) [hppa 64]: Move down into mainKevin Ryde2003-08-191-13/+14
| | | | | __GNUC__ block. Exclude for _LONG_LONG_LIMB (ie. ABI=2.0n) since these forms are only for ABI=2.0w.
* * longlong.h (count_leading_zeros) [__mcpu32__]: Check __mcpu32__ toKevin Ryde2003-08-191-3/+6
| | | | avoid bfffo on GCC 3.4 in CPU32 mode. Reported by Bernardo Innocenti.
* * longlong.h (count_trailing_zeros) [x86_64]: Use "%q0" to forceKevin Ryde2003-08-191-3/+1
| | | | 64-bit register destination. Pointed out by Torbjorn.
* * longlong.h (COUNT_LEADING_ZEROS_NEED_CLZ_TAB) [x86 fat]: Define.Kevin Ryde2003-08-021-0/+5
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* * longlong.h (count_trailing_zeros) [x86_64]: Ensure bsfq destinationKevin Ryde2003-07-311-1/+7
| | | | is a 64-bit register. Diagnosed by Francois G. Dorais.
* [ppc]: Remove nested test for vxworks.tege2003-07-311-1/+1
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* Tabify.tege2003-06-091-30/+30
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* * longlong.h (add_ssaaaa) [pa64]: Output zero operand as register 0.tege2003-06-051-8/+8
| | | | | | | Allow more immediate operands. (sub_ddmmss) [pa64]: Likewise. (add_ssaaaa) [pa32]: Likewise. (sub_ddmmss) [pa32]: Likewise.
* * longlong.h (add_ssaaaa) [all]: Remove first "%" commutative in each,Kevin Ryde2003-04-241-22/+40
| | | | since gcc only supports one per asm.
* (__udiv_qrnnd_c): Remove redundant casts.tege2003-03-171-4/+5
| | | | | (32-bit sparc): Test HAVE_HOST_CPU_supersparc in addition to various sparc_v8 spellings.
* * longlong.h (count_trailing_zeros) [ia64]: New macro.Kevin Ryde2002-12-221-0/+9
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* (mpn_udiv_qrnnd_r based udiv_qrnnd): Fix typo.tege2002-12-041-1/+1
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* * longlong.h (count_leading_zeros, count_trailing_zeros) [ev67, ev68]:Kevin Ryde2002-12-021-1/+1
| | | | Restrict __asm__ ctlz and cttz to __GNUC__.
* More of last change.tege2002-11-301-1/+1
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