| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | x86: Fix tst-cpu-features-cpuinfo on Ryzen 9 (BZ #27873) | Adhemerval Zanella | 2021-06-24 | 3 | -4/+34 |
| * | x86: Copy IBT and SHSTK usable only if CET is enabled | H.J. Lu | 2021-06-23 | 1 | -2/+5 |
| * | dlfcn: Cleanups after -ldl is no longer required | Florian Weimer | 2021-06-03 | 1 | -11/+2 |
| * | Properly check stack alignment [BZ #27901] | H.J. Lu | 2021-05-24 | 1 | -0/+28 |
| * | x86: Set rep_movsb_threshold to 2112 on processors with FSRM | H.J. Lu | 2021-05-03 | 1 | -0/+4 |
| * | x86: tst-cpu-features-supports.c: Update AMX check | H.J. Lu | 2021-04-22 | 1 | -3/+3 |
| * | nptl: Remove longjmp, siglongjmp from libpthread | Florian Weimer | 2021-04-21 | 1 | -71/+0 |
| * | Move __isnanf128 to libc.so | Siddhesh Poyarekar | 2021-03-30 | 1 | -0/+1 |
| * | x86: Add string/memory function tests in RTM region | H.J. Lu | 2021-03-29 | 12 | -0/+618 |
| * | x86: Set Prefer_No_VZEROUPPER and add Prefer_AVX2_STRCMP | H.J. Lu | 2021-03-29 | 3 | -2/+21 |
| * | x86: Properly disable XSAVE related features [BZ #27605] | H.J. Lu | 2021-03-29 | 2 | -0/+56 |
| * | elf: Fix not compiling ifunc tests that need gcc ifunc support | Samuel Thibault | 2021-03-24 | 1 | -0/+2 |
| * | Build get-cpuid-feature-leaf.c without stack-protector [BZ #27555] | Siddhesh Poyarekar | 2021-03-15 | 2 | -0/+4 |
| * | x86: Handle _SC_LEVEL1_ICACHE_LINESIZE [BZ #27444] | H.J. Lu | 2021-03-15 | 7 | -0/+79 |
| * | x86: Set minimum x86-64 level marker [BZ #27318] | H.J. Lu | 2021-03-06 | 3 | -11/+58 |
| * | x86: Add CPU-specific diagnostics to ld.so --list-diagnostics | Florian Weimer | 2021-03-02 | 2 | -0/+120 |
| * | x86: Automate generation of PREFERRED_FEATURE_INDEX_1 bitfield | Florian Weimer | 2021-03-02 | 2 | -34/+51 |
| * | x86: Use x86/nptl/pthreaddef.h | H.J. Lu | 2021-02-22 | 1 | -0/+49 |
| * | x86: Remove unused variables for raw cache sizes from cacheinfo.h | Florian Weimer | 2021-02-22 | 1 | -12/+0 |
| * | <bits/platform/x86.h>: Correct x86_cpu_TBM | H.J. Lu | 2021-02-22 | 1 | -1/+1 |
| * | x86: Remove the extra space between "# endif" | H.J. Lu | 2021-02-12 | 1 | -1/+1 |
| * | x86: Use SIZE_MAX instead of (long int)-1 for tunable range value | Siddhesh Poyarekar | 2021-02-10 | 1 | -5/+5 |
| * | tunables: Simplify TUNABLE_SET interface | Siddhesh Poyarekar | 2021-02-10 | 1 | -9/+6 |
| * | x86: Add PTWRITE feature detection [BZ #27346] | H.J. Lu | 2021-02-07 | 9 | -5/+44 |
| * | x86: Adding an upper bound for Enhanced REP MOVSB. | Sajan Karumanchi | 2021-02-02 | 3 | -1/+20 |
| * | sysconf: Add _SC_MINSIGSTKSZ/_SC_SIGSTKSZ [BZ #20305] | H.J. Lu | 2021-02-01 | 2 | -0/+30 |
| * | x86: Properly set usable CET feature bits [BZ #26625] | H.J. Lu | 2021-01-29 | 10 | -13/+120 |
| * | Fix misplaced const | Andreas Schwab | 2021-01-25 | 2 | -2/+2 |
| * | x86: Properly match CPU features in /proc/cpuinfo [BZ #27222] | H.J. Lu | 2021-01-22 | 1 | -13/+30 |
| * | x86: Check ifunc resolver with CPU_FEATURE_USABLE [BZ #27072] | H.J. Lu | 2021-01-21 | 6 | -0/+184 |
| * | Use hidden visibility for early static PIE code | Szabolcs Nagy | 2021-01-21 | 1 | -0/+5 |
| * | <sys/platform/x86.h>: Remove the C preprocessor magic | H.J. Lu | 2021-01-21 | 12 | -832/+1153 |
| * | x86: Move x86 processor cache info to cpu_features | H.J. Lu | 2021-01-14 | 5 | -412/+551 |
| * | Fix x86 build with --enable-tunable=no | Adhemerval Zanella | 2021-01-14 | 1 | -0/+1 |
| * | ldconfig/x86: Store ISA level in cache and aux cache | H.J. Lu | 2021-01-13 | 1 | -0/+31 |
| * | x86: Set header.feature_1 in TCB for always-on CET [BZ #27177] | H.J. Lu | 2021-01-13 | 3 | -1/+11 |
| * | x86: Support GNU_PROPERTY_X86_ISA_1_V[234] marker [BZ #26717] | H.J. Lu | 2021-01-07 | 17 | -41/+607 |
| * | Drop nan-pseudo-number.h usage from tests | Siddhesh Poyarekar | 2021-01-04 | 1 | -1/+0 |
| * | Update copyright dates with scripts/update-copyrights | Paul Eggert | 2021-01-02 | 81 | -81/+81 |
| * | x86 long double: Consider pseudo numbers as signaling | Siddhesh Poyarekar | 2020-12-30 | 1 | -0/+30 |
| * | Remove _ISOMAC check from <cpu-features.h> | H.J. Lu | 2020-12-24 | 1 | -81/+75 |
| * | x86: Remove the duplicated CPU_FEATURE_CPU_P | H.J. Lu | 2020-12-24 | 1 | -2/+0 |
| * | Partially revert 681900d29683722b1cb0a8e565a0585846ec5a61 | Siddhesh Poyarekar | 2020-12-24 | 2 | -12/+1 |
| * | x86 long double: Support pseudo numbers in isnanl | Siddhesh Poyarekar | 2020-12-24 | 1 | -0/+45 |
| * | x86 long double: Support pseudo numbers in fpclassifyl | Siddhesh Poyarekar | 2020-12-24 | 1 | -0/+46 |
| * | <sys/platform/x86.h>: Add Intel LAM support | H.J. Lu | 2020-12-22 | 2 | -0/+4 |
| * | x86: Remove the default REP MOVSB threshold tunable value [BZ #27061] | H.J. Lu | 2020-12-14 | 1 | -2/+4 |
| * | elf: Pass the fd to note processing | Szabolcs Nagy | 2020-12-11 | 1 | -3/+3 |
| * | x86: Adjust tst-cpu-features-supports.c for GCC 11 | H.J. Lu | 2020-12-04 | 1 | -5/+10 |
| * | x86: Set RDRAND usable if CPU supports RDRAND | H.J. Lu | 2020-12-04 | 1 | -0/+1 |
