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* PowerPC: Remove redundant ports/sysdeps/powerpc/dl-procinfo.[hc].Ryan S. Arnold2013-05-163-290/+8
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* PowerPC: Merge ports/ dl-procinfo.[hc] with base.Ryan S. Arnold2013-05-162-69/+74
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* Add support for AT_HWCAP2.Ryan S. Arnold2013-05-168-7/+53
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* Add #include <stdint.h> for uint[32|64]_t usage (except installed headers).Ryan S. Arnold2013-05-1610-0/+31
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* hppa: Cleanup libm-test-ulps.Carlos O'Donell2013-05-152-420/+3
| | | | | | | | | | | | | | | | Joseph Myers noted that there were several old and really very incorrect values in the hppa libm-test-ulps. This patch removes all of the ulps values for ceil, floor, rint, round, trun, llrint, and llround, all of which were previously incorreclty added (including some negative values which are really wrong). --- ports/ 2013-05-15 Carlos O'Donell <carlos@redhat.com> * sysdeps/hppa/fpu/libm-test-ulps: Remove old values for ceil, floor, rint, round, trunc, llrint, and llround.
* hppa: Update libm-test-ulpsCarlos O'Donell2013-05-152-15/+4168
| | | | | | | | | | | | | | Update libm-test-ulps for hppa. There are a few entries with 4 or 5 ulps, but these appear to be expected. A more thorough review will be required if hppa switches long-double to a different type. --- ports/ 2013-05-15 Carlos O'Donell <carlos@redhat.com> * sysdeps/hppa/fpu/libm-test-ulps: Regenerate.
* hppa: Fix _FPU_GETCW and _FPU_SETCW.Carlos O'Donell2013-05-152-2/+9
| | | | | | | | | | | | | | | | | | | | The following patch fixes both _FPU_GETCW and _FPU_SETCW for hppa. The initial implementation was flawed and not well tested. We failed to set cw, and passed in the value of a register to fldd. This patch fixes both of those errors and allows the libm tests to pass without failure. Signed-off-by: Guy Martin <gmsoft@tuxicoman.be> Signed-off-by: Carlos O'Donell <carlos@redhat.com> --- 2013-05-15 Guy Martin <gmsoft@tuxicoman.be> Carlos O'Donell <carlos@redhat.com> [BZ# 15000] * ports/sysdeps/hppa/fpu/fpu_control.h (_FPU_GETCW): Set cw. (_FPU_SETCW): Pass address to fldd.
* Stop ARM setjmp/longjmp saving/restoring fpscr (bug 14908).Joseph Myers2013-05-144-13/+11
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* ARM: Make multiarch memcpy always use NEON when compiler doesRoland McGrath2013-05-135-11/+43
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* [AArch64] Fix out of range branch from ioctl() and clone()Marcus Shawcroft2013-05-123-4/+11
| | | | | | | | | | 2013-05-12 Marcus Shawcroft <marcus.shawcroft@linaro.org> * sysdeps/unix/sysv/linux/aarch64/clone.S (__clone): Do not call sycall_error directly with a confitional branch. * sysdeps/unix/sysv/linux/aarch64/ioctl.S (__ioctl): Do not call sycall_error directly with a confitional branch.
* ARM: Add Cortex-A15 optimized NEON and VFP memcpy routines, with IFUNC.Will Newton2013-05-0810-0/+866
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* ARM: Rewrite elf_machine_dynamic in pure C.Roland McGrath2013-05-072-21/+9
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* ARM: Add missing sfi_breg prefix in _dl_tlsdesc_dynamic code.Roland McGrath2013-05-062-0/+5
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* ARM: Macroize assembly use of EABI unwind directives.Roland McGrath2013-04-193-15/+31
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* MicroBlaze PortDavid Holsgrove2013-04-18101-0/+12503
| | | | | Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
* m68k: update libm test ULPsAndreas Schwab2013-04-112-4/+3600
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* New <math.h> macro named issignaling to check for a signaling NaN (sNaN).Thomas Schwinge2013-04-0217-0/+121
| | | | It is based on draft TS 18661 and currently enabled as a GNU extension.
* ARM: fix preconfigure.Mans Rullgard2013-03-263-2/+7
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* Use LIBC_CONFIG_VAR for MIPS default-abi setting.Joseph Myers2013-03-214-5/+11
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* Use LIBC_CONFIG_VAR for ARM default-abi setting.Joseph Myers2013-03-204-7/+14
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* aarch64: Move rtld link to /libAndreas Schwab2013-03-193-0/+8
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* ARM: Make dl-tlsdesc.S use sfi_breg, respect ARM_ALWAYS_BX and ↵Roland McGrath2013-03-183-9/+38
| | | | ARM_NO_INDEX_REGISTER.
* Better distinguish between NaN/qNaN/sNaN.Thomas Schwinge2013-03-151-8/+8
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* Avoid duplicate MAP_ANONYMOUS definition for MIPS GNU/Linux.Thomas Schwinge2013-03-152-1/+5
| | | | Follow-up to commit 664a9ce4ca40feabff781fff044c93a43ae15b59.
* ARM: sfi_sp assembler macroRoland McGrath2013-03-153-1/+9
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* ARM: sfi_breg assembler macroRoland McGrath2013-03-1518-189/+404
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* aarch64: use lib64 as default lib and slib directoryAndreas Schwab2013-03-143-0/+31
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* ARM_BX_ALIGN_LOG2Roland McGrath2013-03-134-12/+63
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* ARM: Handle ARM_ALWAYS_BX in {add,sub}_n.S code.Roland McGrath2013-03-132-0/+9
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* ARM: Support avoiding pc as destination register.Roland McGrath2013-03-134-2/+67
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* ARM: Make armv6t2 memchr implementation usable without Thumb.Roland McGrath2013-03-122-2/+26
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* ARM: Change register allocation in armv6t2 memchr implementation.Roland McGrath2013-03-122-15/+20
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* ia64: fix set-but-unused warnings with syscallsMike Frysinger2013-03-122-2/+11
| | | | | | | | | | | These macros often set up a variable that later macros sometimes do not use. Add unused attribute to avoid that. Similarly, the ia64 code tends to check the err field rather than the val (which is opposite of most arches) leading to the same kind of warning. Replace this with a dummy reference. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* ia64: fix strict aliasing warnings with libm errorMike Frysinger2013-03-122-58/+81
| | | | | | | | The current code declares double constants by using a char buffer and then casting the pointer to a different type. This makes the aliasing logic unhappy. Change it to use a union instead to avoid that. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* ia64: fix strict aliasing warnings with func descriptorsMike Frysinger2013-03-125-13/+34
| | | | | | | | | | | Function pointers on ia64 are like parisc -- they're plabels. While the parisc port enjoys a gcc builtin for extracting the address here, ia64 has no such luck. Casting & dereferencing in one go triggers a strict aliasing warning. Use a union to fix that. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Add comments about ARM configure -fno-unwind-tables handling.Joseph Myers2013-03-115-0/+21
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* ARM: Consolidate setjmp details in include/bits/setjmp.h file.Roland McGrath2013-03-116-10/+28
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* ARM: Convert string/ assembly to unified syntax.Roland McGrath2013-03-115-40/+53
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* ARM: Use r10 instead of r9.Roland McGrath2013-03-113-18/+21
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* AM33: Use <bits/mman.h>Andreas Jaeger2013-03-112-61/+7
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* Use <bits/mman.h> on ia64Andreas Jaeger2013-03-112-74/+7
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* Clean up ARM preconfigure.Roland McGrath2013-03-113-46/+109
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* Remove extra pthread_atfork compat symbolsAndreas Schwab2013-03-1110-6/+28
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* ia64: makecontext: fix signed warningsMike Frysinger2013-03-102-2/+7
| | | | | | | | The ia64_rse_is_rnat_slot func expects an unsigned pointer, but we're passing in a signed pointer. The signness doesn't matter here, so convert it to unsigned. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* ia64: fix NEED_DL_SYSINFO_DSO conditionalsMike Frysinger2013-03-102-23/+13
| | | | | | | The recent change to clean up these defines missed the ia64 logic. Update it accordingly. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* arm: Implement armv6 optimized string routinesRichard Henderson2013-03-078-0/+707
| | | | | | | | The strcpy and strchr (and related) functions are four times faster than the byte-by-byte default versions. The strlen function is twice as fast for long strings and 50% faster for short strings over the armv4 version.
* AARCH64: Use <bits/mman-linux.h>Andreas Jaeger2013-03-072-73/+8
| | | | | * sysdeps/unix/sysv/linux/aarch64/bits/mman.h: Remove all defines provided by bits/mman-linux.h and include <bits/mman-linux.h>.
* Use <bits/mman-linux.h> for MIPSAndreas Jaeger2013-03-062-72/+9
| | | | | | | | | * sysdeps/unix/sysv/linux/bits/mman-linux.h (MAP_ANONYMOUS): Allow definition via __MAP_ANONYMOUS. * sysdeps/unix/sysv/linux/mips/bits/mman.h: Remove all defines provided by bits/mman-linux.h and include <bits/mman-linux.h>. (__MAP_ANONYMOUS): Define.
* arm: Add optimized add_n and sub_nRichard Henderson2013-03-063-0/+88
| | | | | | | | Written from scratch rather than copied from GMP, due to LGPL 2.1 vs GPL 3, but tested with the GMP testsuite. This is 250% faster than the generic code as measured on Cortex-A15, and the same speed as GMP on the same core, and probably everywhere.
* arm: Add optimized submul_1Richard Henderson2013-03-062-0/+69
| | | | | | | | Written from scratch rather than copied from GMP, due to LGPL 2.1 vs GPL 3, but tested with the GMP testsuite. This is 50% faster than the generic code as measured on Cortex-A15. It is 25% slower than the current GMP routine on the same core.
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