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-rw-r--r--sysdeps/i386/fpu/e_pow.S8
-rw-r--r--sysdeps/i386/fpu/e_powf.S13
-rw-r--r--sysdeps/i386/fpu/e_powl.S6
-rw-r--r--sysdeps/i386/fpu/i386-math-asm.h46
4 files changed, 68 insertions, 5 deletions
diff --git a/sysdeps/i386/fpu/e_pow.S b/sysdeps/i386/fpu/e_pow.S
index 2903e13e59..8203c9625a 100644
--- a/sysdeps/i386/fpu/e_pow.S
+++ b/sysdeps/i386/fpu/e_pow.S
@@ -54,6 +54,7 @@ minfinity:
mzero:
.byte 0, 0, 0, 0, 0, 0, 0, 0x80
ASM_SIZE_DIRECTIVE(minf_mzero)
+DEFINE_DBL_MIN
#ifdef PIC
# define MO(op) op##@GOTOFF(%ecx)
@@ -166,7 +167,10 @@ ENTRY(__ieee754_pow)
orl %edx, %ecx
jnz 6b
fstp %st(0) // ST*x
- DBL_NARROW_EVAL
+#ifdef PIC
+ LOAD_PIC_REG (cx)
+#endif
+ DBL_NARROW_EVAL_UFLOW_NONNAN
ret
/* y is ±NAN */
@@ -259,7 +263,7 @@ ENTRY(__ieee754_pow)
cfi_adjust_cfa_offset (-8)
292: fscale // +/- 2^fract(y*log2(x))*2^int(y*log2(x)) : int(y*log2(x))
fstp %st(1) // +/- 2^fract(y*log2(x))*2^int(y*log2(x))
- DBL_NARROW_EVAL
+ DBL_NARROW_EVAL_UFLOW_NONNAN
ret
diff --git a/sysdeps/i386/fpu/e_powf.S b/sysdeps/i386/fpu/e_powf.S
index d929bdc9f1..6608d3e9d1 100644
--- a/sysdeps/i386/fpu/e_powf.S
+++ b/sysdeps/i386/fpu/e_powf.S
@@ -51,6 +51,7 @@ minfinity:
mzero:
.byte 0, 0, 0, 0, 0, 0, 0, 0x80
ASM_SIZE_DIRECTIVE(minf_mzero)
+DEFINE_FLT_MIN
#ifdef PIC
# define MO(op) op##@GOTOFF(%ecx)
@@ -97,7 +98,7 @@ ENTRY(__ieee754_powf)
je 15f // x is ±inf
cmpb $0x01, %ah
- je 32f // x is NaN
+ je 33f // x is NaN
fxch // y : x
@@ -149,7 +150,7 @@ ENTRY(__ieee754_powf)
testl %edx, %edx
jnz 6b
fstp %st(0) // ST*x
- FLT_NARROW_EVAL
+ FLT_NARROW_EVAL_UFLOW_NONNAN
ret
/* y is ±NAN */
@@ -198,9 +199,15 @@ ENTRY(__ieee754_powf)
32: addl $4, %esp
cfi_adjust_cfa_offset (-4)
fstp %st(1) // 2^fract(y*log2(x))*2^int(y*log2(x))
- FLT_NARROW_EVAL
+ FLT_NARROW_EVAL_UFLOW_NONNAN
ret
+ /* x is NaN. */
+ cfi_adjust_cfa_offset (4)
+33: addl $4, %esp
+ cfi_adjust_cfa_offset (-4)
+ fstp %st(1)
+ ret
// pow(x,±0) = 1
.align ALIGNARG(4)
diff --git a/sysdeps/i386/fpu/e_powl.S b/sysdeps/i386/fpu/e_powl.S
index bdfb5cf635..76ca8213fd 100644
--- a/sysdeps/i386/fpu/e_powl.S
+++ b/sysdeps/i386/fpu/e_powl.S
@@ -18,6 +18,7 @@
<http://www.gnu.org/licenses/>. */
#include <machine/asm.h>
+#include <i386-math-asm.h>
.section .rodata.cst8,"aM",@progbits,8
@@ -59,6 +60,7 @@ minfinity:
mzero:
.byte 0, 0, 0, 0, 0, 0, 0, 0x80
ASM_SIZE_DIRECTIVE(minf_mzero)
+DEFINE_LDBL_MIN
#ifdef PIC
# define MO(op) op##@GOTOFF(%ecx)
@@ -187,6 +189,10 @@ ENTRY(__ieee754_powl)
orl %edx, %ecx
jnz 6b
fstp %st(0) // ST*x
+#ifdef PIC
+ LOAD_PIC_REG (cx)
+#endif
+ LDBL_CHECK_FORCE_UFLOW_NONNAN
ret
/* y is ±NAN */
diff --git a/sysdeps/i386/fpu/i386-math-asm.h b/sysdeps/i386/fpu/i386-math-asm.h
index 5d8d847cc3..4bac3bf5ab 100644
--- a/sysdeps/i386/fpu/i386-math-asm.h
+++ b/sysdeps/i386/fpu/i386-math-asm.h
@@ -131,6 +131,40 @@ ldbl_min: \
addl $8, %esp; \
cfi_adjust_cfa_offset (-8);
+/* Likewise, but the non-NaN argument may be negative. */
+#define FLT_NARROW_EVAL_UFLOW_NONNAN \
+ subl $4, %esp; \
+ cfi_adjust_cfa_offset (4); \
+ fld %st(0); \
+ fabs; \
+ fcomps MO(flt_min); \
+ fnstsw; \
+ sahf; \
+ jnc 6424f; \
+ fld %st(0); \
+ fmul %st(0); \
+ fstps (%esp); \
+6424: fstps (%esp); \
+ flds (%esp); \
+ addl $4, %esp; \
+ cfi_adjust_cfa_offset (-4);
+#define DBL_NARROW_EVAL_UFLOW_NONNAN \
+ subl $8, %esp; \
+ cfi_adjust_cfa_offset (8); \
+ fld %st(0); \
+ fabs; \
+ fcompl MO(dbl_min); \
+ fnstsw; \
+ sahf; \
+ jnc 6453f; \
+ fld %st(0); \
+ fmul %st(0); \
+ fstpl (%esp); \
+6453: fstpl (%esp); \
+ fldl (%esp); \
+ addl $8, %esp; \
+ cfi_adjust_cfa_offset (-8);
+
/* Force an underflow exception if the given value is subnormal. The
relevant constant for the minimum of the type must have been
defined, the MO macro must have been defined for access to memory
@@ -251,6 +285,18 @@ ldbl_min: \
addl $8, %esp; \
cfi_adjust_cfa_offset (-8); \
6453:
+#define LDBL_CHECK_FORCE_UFLOW_NONNAN \
+ fldt MO(ldbl_min); \
+ fld %st(1); \
+ fabs; \
+ fcompp; \
+ fnstsw; \
+ sahf; \
+ jnc 6464f; \
+ fld %st(0); \
+ fmul %st(0); \
+ fstp %st(0); \
+6464:
/* Likewise, but the argument is nonnegative and not a NaN. */
#define FLT_CHECK_FORCE_UFLOW_NONNEG \