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-rw-r--r--sysdeps/arm/fpu/__longjmp.S36
-rw-r--r--sysdeps/arm/fpu/bits/fenv.h58
-rw-r--r--sysdeps/arm/fpu/bits/mathdef.h44
-rw-r--r--sysdeps/arm/fpu/bits/setjmp.h36
-rw-r--r--sysdeps/arm/fpu/fclrexcpt.c50
-rw-r--r--sysdeps/arm/fpu/fedisblxcpt.c40
-rw-r--r--sysdeps/arm/fpu/feenablxcpt.c40
-rw-r--r--sysdeps/arm/fpu/fegetenv.c40
-rw-r--r--sysdeps/arm/fpu/fegetexcept.c32
-rw-r--r--sysdeps/arm/fpu/fegetround.c26
-rw-r--r--sysdeps/arm/fpu/feholdexcpt.c37
-rw-r--r--sysdeps/arm/fpu/fesetenv.c45
-rw-r--r--sysdeps/arm/fpu/fesetround.c27
-rw-r--r--sysdeps/arm/fpu/fpu_control.h102
-rw-r--r--sysdeps/arm/fpu/fraiseexcpt.c44
-rw-r--r--sysdeps/arm/fpu/fsetexcptflg.c49
-rw-r--r--sysdeps/arm/fpu/ftestexcept.c32
-rw-r--r--sysdeps/arm/fpu/setjmp.S35
18 files changed, 773 insertions, 0 deletions
diff --git a/sysdeps/arm/fpu/__longjmp.S b/sysdeps/arm/fpu/__longjmp.S
new file mode 100644
index 0000000000..90efeec1eb
--- /dev/null
+++ b/sysdeps/arm/fpu/__longjmp.S
@@ -0,0 +1,36 @@
+/* longjmp for ARM.
+ Copyright (C) 1997, 1998 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, write to the Free
+ Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
+ 02111-1307 USA. */
+
+#include <sysdep.h>
+#define _SETJMP_H
+#define _ASM
+#include <bits/setjmp.h>
+
+/* __longjmp(jmpbuf, val) */
+
+ENTRY (__longjmp)
+ mov ip, r0 /* save jmp_buf pointer */
+
+ movs r0, r1 /* get the return value in place */
+ moveq r0, #1 /* can't let setjmp() return zero! */
+
+ lfmfd f4, 4, [ip] ! /* load the floating point regs */
+
+ LOADREGS(ia, ip, {v1-v6, sl, fp, sp, pc})
+END (__longjmp)
diff --git a/sysdeps/arm/fpu/bits/fenv.h b/sysdeps/arm/fpu/bits/fenv.h
new file mode 100644
index 0000000000..7bd242385f
--- /dev/null
+++ b/sysdeps/arm/fpu/bits/fenv.h
@@ -0,0 +1,58 @@
+/* Copyright (C) 1997, 1998, 1999 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, write to the Free
+ Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
+ 02111-1307 USA. */
+
+#ifndef _FENV_H
+# error "Never use <bits/fenv.h> directly; include <fenv.h> instead."
+#endif
+
+/* Define bits representing exceptions in the FPU status word. */
+enum
+ {
+ FE_INVALID = 1,
+#define FE_INVALID FE_INVALID
+ FE_DIVBYZERO = 2,
+#define FE_DIVBYZERO FE_DIVBYZERO
+ FE_OVERFLOW = 4,
+#define FE_OVERFLOW FE_OVERFLOW
+ FE_UNDERFLOW = 8,
+#define FE_UNDERFLOW FE_UNDERFLOW
+ };
+
+/* Amount to shift by to convert an exception to a mask bit. */
+#define FE_EXCEPT_SHIFT 16
+
+/* All supported exceptions. */
+#define FE_ALL_EXCEPT \
+ (FE_INVALID | FE_DIVBYZERO | FE_OVERFLOW | FE_UNDERFLOW)
+
+/* The ARM FPU basically only supports round-to-nearest. Other rounding
+ modes exist, but you have to encode them in the actual instruction. */
+#define FE_TONEAREST 0
+
+/* Type representing exception flags. */
+typedef unsigned long int fexcept_t;
+
+/* Type representing floating-point environment. */
+typedef struct
+ {
+ unsigned long int __cw;
+ }
+fenv_t;
+
+/* If the default argument is used we use this value. */
+#define FE_DFL_ENV ((fenv_t *) -1l)
diff --git a/sysdeps/arm/fpu/bits/mathdef.h b/sysdeps/arm/fpu/bits/mathdef.h
new file mode 100644
index 0000000000..e013e74b7e
--- /dev/null
+++ b/sysdeps/arm/fpu/bits/mathdef.h
@@ -0,0 +1,44 @@
+/* Copyright (C) 1999, 2000, 2004 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, write to the Free
+ Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
+ 02111-1307 USA. */
+
+#if !defined _MATH_H && !defined _COMPLEX_H
+# error "Never use <bits/mathdef.h> directly; include <math.h> instead"
+#endif
+
+#if defined __USE_ISOC99 && defined _MATH_H && !defined _MATH_H_MATHDEF
+# define _MATH_H_MATHDEF 1
+
+/* GCC does not promote `float' values to `double'. */
+typedef float float_t; /* `float' expressions are evaluated as
+ `float'. */
+typedef double double_t; /* `double' expressions are evaluated as
+ `double'. */
+
+/* The values returned by `ilogb' for 0 and NaN respectively. */
+# define FP_ILOGB0 (-2147483647)
+# define FP_ILOGBNAN (2147483647)
+
+#endif /* ISO C99 */
+
+#ifndef __NO_LONG_DOUBLE_MATH
+/* Signal that we do not really have a `long double'. This disables the
+ declaration of all the `long double' function variants. */
+/* XXX The FPA does support this but the patterns in GCC are currently
+ turned off. */
+# define __NO_LONG_DOUBLE_MATH 1
+#endif
diff --git a/sysdeps/arm/fpu/bits/setjmp.h b/sysdeps/arm/fpu/bits/setjmp.h
new file mode 100644
index 0000000000..dd85243032
--- /dev/null
+++ b/sysdeps/arm/fpu/bits/setjmp.h
@@ -0,0 +1,36 @@
+/* Copyright (C) 1997, 1998 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, write to the Free
+ Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
+ 02111-1307 USA. */
+
+/* Define the machine-dependent type `jmp_buf'. ARM version. */
+
+#ifndef _SETJMP_H
+# error "Never include <bits/setjmp.h> directly; use <setjmp.h> instead."
+#endif
+
+#ifndef _ASM
+/* Jump buffer contains v1-v6, sl, fp, sp and pc. Other registers are not
+ saved. */
+typedef int __jmp_buf[22];
+#endif
+
+#define __JMP_BUF_SP 20
+
+/* Test if longjmp to JMPBUF would unwind the frame
+ containing a local variable at ADDRESS. */
+#define _JMPBUF_UNWINDS(jmpbuf, address) \
+ ((void *) (address) < (void *) (jmpbuf[__JMP_BUF_SP]))
diff --git a/sysdeps/arm/fpu/fclrexcpt.c b/sysdeps/arm/fpu/fclrexcpt.c
new file mode 100644
index 0000000000..c6a53df45a
--- /dev/null
+++ b/sysdeps/arm/fpu/fclrexcpt.c
@@ -0,0 +1,50 @@
+/* Clear given exceptions in current floating-point environment.
+ Copyright (C) 1997,98,99,2000,01 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, write to the Free
+ Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
+ 02111-1307 USA. */
+
+#include <fenv.h>
+#include <fpu_control.h>
+
+int
+__feclearexcept (int excepts)
+{
+ unsigned long int temp;
+
+ /* Mask out unsupported bits/exceptions. */
+ excepts &= FE_ALL_EXCEPT;
+
+ /* Get the current floating point status. */
+ _FPU_GETCW (temp);
+
+ /* Clear the relevant bits. */
+ temp &= excepts ^ FE_ALL_EXCEPT;
+
+ /* Put the new data in effect. */
+ _FPU_SETCW (temp);
+
+ /* Success. */
+ return 0;
+}
+
+#include <shlib-compat.h>
+#if SHLIB_COMPAT (libm, GLIBC_2_1, GLIBC_2_2)
+strong_alias (__feclearexcept, __old_feclearexcept)
+compat_symbol (libm, __old_feclearexcept, feclearexcept, GLIBC_2_1);
+#endif
+
+versioned_symbol (libm, __feclearexcept, feclearexcept, GLIBC_2_2);
diff --git a/sysdeps/arm/fpu/fedisblxcpt.c b/sysdeps/arm/fpu/fedisblxcpt.c
new file mode 100644
index 0000000000..91f60a9c90
--- /dev/null
+++ b/sysdeps/arm/fpu/fedisblxcpt.c
@@ -0,0 +1,40 @@
+/* Disable floating-point exceptions.
+ Copyright (C) 2001 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+ Contributed by Philip Blundell <philb@gnu.org>, 2001.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, write to the Free
+ Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
+ 02111-1307 USA. */
+
+#include <fenv.h>
+#include <fpu_control.h>
+
+int
+fedisableexcept (int excepts)
+{
+ unsigned long int new_exc, old_exc;
+
+ _FPU_GETCW(new_exc);
+
+ old_exc = (new_exc >> FE_EXCEPT_SHIFT) & FE_ALL_EXCEPT;
+
+ excepts &= FE_ALL_EXCEPT;
+
+ new_exc &= ~(excepts << FE_EXCEPT_SHIFT);
+
+ _FPU_SETCW(new_exc);
+
+ return old_exc;
+}
diff --git a/sysdeps/arm/fpu/feenablxcpt.c b/sysdeps/arm/fpu/feenablxcpt.c
new file mode 100644
index 0000000000..e77e45a523
--- /dev/null
+++ b/sysdeps/arm/fpu/feenablxcpt.c
@@ -0,0 +1,40 @@
+/* Enable floating-point exceptions.
+ Copyright (C) 2001 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+ Contributed by Philip Blundell <philb@gnu.org>, 2001.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, write to the Free
+ Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
+ 02111-1307 USA. */
+
+#include <fenv.h>
+#include <fpu_control.h>
+
+int
+feenableexcept (int excepts)
+{
+ unsigned long int new_exc, old_exc;
+
+ _FPU_GETCW(new_exc);
+
+ old_exc = (new_exc >> FE_EXCEPT_SHIFT) & FE_ALL_EXCEPT;
+
+ excepts &= FE_ALL_EXCEPT;
+
+ new_exc |= (excepts << FE_EXCEPT_SHIFT);
+
+ _FPU_SETCW(new_exc);
+
+ return old_exc;
+}
diff --git a/sysdeps/arm/fpu/fegetenv.c b/sysdeps/arm/fpu/fegetenv.c
new file mode 100644
index 0000000000..0b40f183e2
--- /dev/null
+++ b/sysdeps/arm/fpu/fegetenv.c
@@ -0,0 +1,40 @@
+/* Store current floating-point environment.
+ Copyright (C) 1997,98,99,2000,01 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, write to the Free
+ Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
+ 02111-1307 USA. */
+
+#include <fenv.h>
+#include <fpu_control.h>
+
+int
+__fegetenv (fenv_t *envp)
+{
+ unsigned long int temp;
+ _FPU_GETCW (temp);
+ envp->__cw = temp;
+
+ /* Success. */
+ return 0;
+}
+
+#include <shlib-compat.h>
+#if SHLIB_COMPAT (libm, GLIBC_2_1, GLIBC_2_2)
+strong_alias (__fegetenv, __old_fegetenv)
+compat_symbol (libm, __old_fegetenv, fegetenv, GLIBC_2_1);
+#endif
+
+versioned_symbol (libm, __fegetenv, fegetenv, GLIBC_2_2);
diff --git a/sysdeps/arm/fpu/fegetexcept.c b/sysdeps/arm/fpu/fegetexcept.c
new file mode 100644
index 0000000000..653c8d5a0d
--- /dev/null
+++ b/sysdeps/arm/fpu/fegetexcept.c
@@ -0,0 +1,32 @@
+/* Get floating-point exceptions.
+ Copyright (C) 2001 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+ Contributed by Philip Blundell <philb@gnu.org>, 2001
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, write to the Free
+ Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
+ 02111-1307 USA. */
+
+#include <fenv.h>
+#include <fpu_control.h>
+
+int
+fegetexcept (void)
+{
+ unsigned long temp;
+
+ _FPU_GETCW (temp);
+
+ return (temp >> FE_EXCEPT_SHIFT) & FE_ALL_EXCEPT;
+}
diff --git a/sysdeps/arm/fpu/fegetround.c b/sysdeps/arm/fpu/fegetround.c
new file mode 100644
index 0000000000..6bf65f5b5e
--- /dev/null
+++ b/sysdeps/arm/fpu/fegetround.c
@@ -0,0 +1,26 @@
+/* Return current rounding direction.
+ Copyright (C) 1997, 1998 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, write to the Free
+ Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
+ 02111-1307 USA. */
+
+#include <fenv.h>
+
+int
+fegetround (void)
+{
+ return FE_TONEAREST; /* Easy. :-) */
+}
diff --git a/sysdeps/arm/fpu/feholdexcpt.c b/sysdeps/arm/fpu/feholdexcpt.c
new file mode 100644
index 0000000000..203b068aae
--- /dev/null
+++ b/sysdeps/arm/fpu/feholdexcpt.c
@@ -0,0 +1,37 @@
+/* Store current floating-point environment and clear exceptions.
+ Copyright (C) 1997, 1998, 1999 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, write to the Free
+ Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
+ 02111-1307 USA. */
+
+#include <fenv.h>
+#include <fpu_control.h>
+
+int
+feholdexcept (fenv_t *envp)
+{
+ unsigned long int temp;
+
+ /* Store the environment. */
+ _FPU_GETCW(temp);
+ envp->__cw = temp;
+
+ /* Now set all exceptions to non-stop. */
+ temp &= ~(FE_ALL_EXCEPT << FE_EXCEPT_SHIFT);
+ _FPU_SETCW(temp);
+
+ return 0;
+}
diff --git a/sysdeps/arm/fpu/fesetenv.c b/sysdeps/arm/fpu/fesetenv.c
new file mode 100644
index 0000000000..bb8812acaf
--- /dev/null
+++ b/sysdeps/arm/fpu/fesetenv.c
@@ -0,0 +1,45 @@
+/* Install given floating-point environment.
+ Copyright (C) 1997,98,99,2000,01,02 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, write to the Free
+ Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
+ 02111-1307 USA. */
+
+#include <fenv.h>
+#include <fpu_control.h>
+
+int
+__fesetenv (const fenv_t *envp)
+{
+ if (envp == FE_DFL_ENV)
+ _FPU_SETCW (_FPU_DEFAULT);
+ else
+ {
+ unsigned long int temp = envp->__cw;
+ _FPU_SETCW (temp);
+ }
+
+ /* Success. */
+ return 0;
+}
+
+#include <shlib-compat.h>
+#if SHLIB_COMPAT (libm, GLIBC_2_1, GLIBC_2_2)
+strong_alias (__fesetenv, __old_fesetenv)
+compat_symbol (libm, __old_fesetenv, fesetenv, GLIBC_2_1);
+#endif
+
+libm_hidden_ver (__fesetenv, fesetenv)
+versioned_symbol (libm, __fesetenv, fesetenv, GLIBC_2_2);
diff --git a/sysdeps/arm/fpu/fesetround.c b/sysdeps/arm/fpu/fesetround.c
new file mode 100644
index 0000000000..bdb849ff60
--- /dev/null
+++ b/sysdeps/arm/fpu/fesetround.c
@@ -0,0 +1,27 @@
+/* Set current rounding direction.
+ Copyright (C) 1997, 1998 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, write to the Free
+ Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
+ 02111-1307 USA. */
+
+#include <fenv.h>
+
+int
+fesetround (int round)
+{
+ /* We only support FE_TONEAREST, so there is no need for any work. */
+ return (round == FE_TONEAREST)?0:1;
+}
diff --git a/sysdeps/arm/fpu/fpu_control.h b/sysdeps/arm/fpu/fpu_control.h
new file mode 100644
index 0000000000..65912e4962
--- /dev/null
+++ b/sysdeps/arm/fpu/fpu_control.h
@@ -0,0 +1,102 @@
+/* FPU control word definitions. ARM version.
+ Copyright (C) 1996, 1997, 1998, 2000 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, write to the Free
+ Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
+ 02111-1307 USA. */
+
+#ifndef _FPU_CONTROL_H
+#define _FPU_CONTROL_H
+
+/* We have a slight terminology confusion here. On the ARM, the register
+ * we're interested in is actually the FPU status word - the FPU control
+ * word is something different (which is implementation-defined and only
+ * accessible from supervisor mode.)
+ *
+ * The FPSR looks like this:
+ *
+ * 31-24 23-16 15-8 7-0
+ * | system ID | trap enable | system control | exception flags |
+ *
+ * We ignore the system ID bits; for interest's sake they are:
+ *
+ * 0000 "old" FPE
+ * 1000 FPPC hardware
+ * 0001 FPE 400
+ * 1001 FPA hardware
+ *
+ * The trap enable and exception flags are both structured like this:
+ *
+ * 7 - 5 4 3 2 1 0
+ * | reserved | INX | UFL | OFL | DVZ | IVO |
+ *
+ * where a `1' bit in the enable byte means that the trap can occur, and
+ * a `1' bit in the flags byte means the exception has occurred.
+ *
+ * The exceptions are:
+ *
+ * IVO - invalid operation
+ * DVZ - divide by zero
+ * OFL - overflow
+ * UFL - underflow
+ * INX - inexact (do not use; implementations differ)
+ *
+ * The system control byte looks like this:
+ *
+ * 7-5 4 3 2 1 0
+ * | reserved | AC | EP | SO | NE | ND |
+ *
+ * where the bits mean
+ *
+ * ND - no denormalised numbers (force them all to zero)
+ * NE - enable NaN exceptions
+ * SO - synchronous operation
+ * EP - use expanded packed-decimal format
+ * AC - use alternate definition for C flag on compare operations
+ */
+
+/* masking of interrupts */
+#define _FPU_MASK_IM 0x00010000 /* invalid operation */
+#define _FPU_MASK_ZM 0x00020000 /* divide by zero */
+#define _FPU_MASK_OM 0x00040000 /* overflow */
+#define _FPU_MASK_UM 0x00080000 /* underflow */
+#define _FPU_MASK_PM 0x00100000 /* inexact */
+#define _FPU_MASK_DM 0x00000000 /* denormalized operation */
+
+/* The system id bytes cannot be changed.
+ Only the bottom 5 bits in the trap enable byte can be changed.
+ Only the bottom 5 bits in the system control byte can be changed.
+ Only the bottom 5 bits in the exception flags are used.
+ The exception flags are set by the fpu, but can be zeroed by the user. */
+#define _FPU_RESERVED 0xffe0e0e0 /* These bits are reserved. */
+
+/* The fdlibm code requires strict IEEE double precision arithmetic,
+ no interrupts for exceptions, rounding to nearest. Changing the
+ rounding mode will break long double I/O. Turn on the AC bit,
+ the compiler generates code that assumes it is on. */
+#define _FPU_DEFAULT 0x00001000 /* Default value. */
+#define _FPU_IEEE 0x001f1000 /* Default + exceptions enabled. */
+
+/* Type of the control word. */
+typedef unsigned int fpu_control_t;
+
+/* Macros for accessing the hardware control word. */
+#define _FPU_GETCW(cw) __asm__ ("rfs %0" : "=r" (cw))
+#define _FPU_SETCW(cw) __asm__ ("wfs %0" : : "r" (cw))
+
+/* Default control word set at startup. */
+extern fpu_control_t __fpu_control;
+
+#endif /* _FPU_CONTROL_H */
diff --git a/sysdeps/arm/fpu/fraiseexcpt.c b/sysdeps/arm/fpu/fraiseexcpt.c
new file mode 100644
index 0000000000..f7dede2fe2
--- /dev/null
+++ b/sysdeps/arm/fpu/fraiseexcpt.c
@@ -0,0 +1,44 @@
+/* Raise given exceptions.
+ Copyright (C) 1997,98,99,2000,01,02 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, write to the Free
+ Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
+ 02111-1307 USA. */
+
+#include <fenv.h>
+#include <fpu_control.h>
+#include <math.h>
+
+int
+__feraiseexcept (int excepts)
+{
+ /* Raise exceptions represented by EXPECTS. */
+ fexcept_t temp;
+ _FPU_GETCW (temp);
+ temp |= (excepts & FE_ALL_EXCEPT);
+ _FPU_SETCW (temp);
+
+ /* Success. */
+ return 0;
+}
+
+#include <shlib-compat.h>
+#if SHLIB_COMPAT (libm, GLIBC_2_1, GLIBC_2_2)
+strong_alias (__feraiseexcept, __old_feraiseexcept)
+compat_symbol (libm, __old_feraiseexcept, feraiseexcept, GLIBC_2_1);
+#endif
+
+libm_hidden_ver (__feraiseexcept, feraiseexcept)
+versioned_symbol (libm, __feraiseexcept, feraiseexcept, GLIBC_2_2);
diff --git a/sysdeps/arm/fpu/fsetexcptflg.c b/sysdeps/arm/fpu/fsetexcptflg.c
new file mode 100644
index 0000000000..4e1d2cba4a
--- /dev/null
+++ b/sysdeps/arm/fpu/fsetexcptflg.c
@@ -0,0 +1,49 @@
+/* Set floating-point environment exception handling.
+ Copyright (C) 1997,98,99,2000,01 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, write to the Free
+ Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
+ 02111-1307 USA. */
+
+#include <fenv.h>
+#include <math.h>
+#include <fpu_control.h>
+
+int
+__fesetexceptflag (const fexcept_t *flagp, int excepts)
+{
+ fexcept_t temp;
+
+ /* Get the current environment. */
+ _FPU_GETCW (temp);
+
+ /* Set the desired exception mask. */
+ temp &= ~((excepts & FE_ALL_EXCEPT) << FE_EXCEPT_SHIFT);
+ temp |= (*flagp & excepts & FE_ALL_EXCEPT) << FE_EXCEPT_SHIFT;
+
+ /* Save state back to the FPU. */
+ _FPU_SETCW (temp);
+
+ /* Success. */
+ return 0;
+}
+
+#include <shlib-compat.h>
+#if SHLIB_COMPAT (libm, GLIBC_2_1, GLIBC_2_2)
+strong_alias (__fesetexceptflag, __old_fesetexceptflag)
+compat_symbol (libm, __old_fesetexceptflag, fesetexceptflag, GLIBC_2_1);
+#endif
+
+versioned_symbol (libm, __fesetexceptflag, fesetexceptflag, GLIBC_2_2);
diff --git a/sysdeps/arm/fpu/ftestexcept.c b/sysdeps/arm/fpu/ftestexcept.c
new file mode 100644
index 0000000000..328bcb05fd
--- /dev/null
+++ b/sysdeps/arm/fpu/ftestexcept.c
@@ -0,0 +1,32 @@
+/* Test exception in current environment.
+ Copyright (C) 1997, 1998 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, write to the Free
+ Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
+ 02111-1307 USA. */
+
+#include <fenv.h>
+#include <fpu_control.h>
+
+int
+fetestexcept (int excepts)
+{
+ fexcept_t temp;
+
+ /* Get current exceptions. */
+ _FPU_GETCW(temp);
+
+ return temp & excepts & FE_ALL_EXCEPT;
+}
diff --git a/sysdeps/arm/fpu/setjmp.S b/sysdeps/arm/fpu/setjmp.S
new file mode 100644
index 0000000000..84328369ac
--- /dev/null
+++ b/sysdeps/arm/fpu/setjmp.S
@@ -0,0 +1,35 @@
+/* setjmp for ARM.
+ Copyright (C) 1997, 1998 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, write to the Free
+ Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
+ 02111-1307 USA. */
+
+#include <sysdep.h>
+#define _SETJMP_H
+#define _ASM
+#include <bits/setjmp.h>
+
+ENTRY (__sigsetjmp)
+ /* Save registers */
+ sfmea f4, 4, [r0]!
+ stmia r0, {v1-v6, sl, fp, sp, lr}
+
+ /* Restore pointer to jmp_buf */
+ sub r0, r0, #48
+
+ /* Make a tail call to __sigjmp_save; it takes the same args. */
+ B PLTJMP(C_SYMBOL_NAME(__sigjmp_save))
+END (__sigsetjmp)