diff options
Diffstat (limited to 'REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/s_llrintf.S')
-rw-r--r-- | REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/s_llrintf.S | 62 |
1 files changed, 62 insertions, 0 deletions
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/s_llrintf.S b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/s_llrintf.S new file mode 100644 index 0000000000..cda284b124 --- /dev/null +++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/s_llrintf.S @@ -0,0 +1,62 @@ +/* llrintf(), sparc32 v9 version. + Copyright (C) 2012-2017 Free Software Foundation, Inc. + This file is part of the GNU C Library. + Contributed by David S. Miller <davem@davemloft.net>, 2012. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + <http://www.gnu.org/licenses/>. */ + +#include <sysdep.h> + + /* We pop constants into the FPU registers using the incoming + argument stack slots, since this avoid having to use any PIC + references. We also thus avoid having to allocate a register + window. + + VIS instructions are used to facilitate the formation of + easier constants, and the propagation of the sign bit. */ + +#define TWO_TWENTYTHREE 0x4b000000 /* 2**23 */ + +#define ZERO %f10 /* 0.0 */ +#define SIGN_BIT %f12 /* -0.0 */ + +ENTRY (__llrintf) + st %o0, [%sp + 68] + sethi %hi(TWO_TWENTYTHREE), %o2 + fzeros ZERO + + ld [%sp + 68], %f1 + fnegs ZERO, SIGN_BIT + + st %o2, [%sp + 68] + fabss %f1, %f14 + + ld [%sp + 68], %f16 + fcmps %fcc3, %f14, %f16 + + fmovsuge %fcc3, ZERO, %f16 + fands %f1, SIGN_BIT, SIGN_BIT + + fors %f16, SIGN_BIT, %f16 + fadds %f1, %f16, %f5 + fsubs %f5, %f16, %f0 + fabss %f0, %f0 + fors %f0, SIGN_BIT, %f0 + fstox %f0, %f4 + std %f4, [%sp + 72] + retl + ldd [%sp + 72], %o0 +END (__llrintf) +weak_alias (__llrintf, llrintf) |