diff options
| -rw-r--r-- | ChangeLog | 5 | ||||
| -rw-r--r-- | sysdeps/aarch64/fpu/fpu_control.h | 7 |
2 files changed, 7 insertions, 5 deletions
@@ -1,5 +1,10 @@ 2014-06-02 Wilco <wdijkstr@arm.com> + * sysdeps/aarch64/fpu/fpu_control.h (_FPU_SETCW): Remove ISB after + FPCR write. + +2014-06-02 Wilco <wdijkstr@arm.com> + [BZ #17009] * sysdeps/aarch64/fpu/feupdateenv (feupdateenv): Rewrite to reduce FPCR/FPSR accesses. diff --git a/sysdeps/aarch64/fpu/fpu_control.h b/sysdeps/aarch64/fpu/fpu_control.h index 6a265e89b5..d5a890d990 100644 --- a/sysdeps/aarch64/fpu/fpu_control.h +++ b/sysdeps/aarch64/fpu/fpu_control.h @@ -24,11 +24,8 @@ #define _FPU_GETCW(fpcr) \ __asm__ __volatile__ ("mrs %0, fpcr" : "=r" (fpcr)) -#define _FPU_SETCW(fpcr) \ - { \ - __asm__ __volatile__ ("msr fpcr, %0" : : "r" (fpcr)); \ - __asm__ __volatile__ ("isb"); \ - } +#define _FPU_SETCW(fpcr) \ + __asm__ __volatile__ ("msr fpcr, %0" : : "r" (fpcr)) #define _FPU_GETFPSR(fpsr) \ __asm__ __volatile__ ("mrs %0, fpsr" : "=r" (fpsr)) |