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authorAndrew Senkevich <andrew.senkevich@intel.com>2015-06-17 15:53:00 +0300
committerAndrew Senkevich <andrew.senkevich@intel.com>2015-06-17 15:53:00 +0300
commit774488f88aeed6b838fe29c3c7561433c242a3c9 (patch)
tree25aaaa25ca25b0ce8855e23fd9b23f1c1f388820 /sysdeps/x86_64/fpu/svml_s_logf_data.S
parent6af25acc7b6313fd8934c3b2f0eb3da5a1c6eb6b (diff)
downloadglibc-774488f88aeed6b838fe29c3c7561433c242a3c9.tar.gz
Vector logf for x86_64 and tests.
Here is implementation of vectorized logf containing SSE, AVX, AVX2 and AVX512 versions according to Vector ABI <https://groups.google.com/forum/#!topic/x86-64-abi/LmppCfN1rZ4>. * sysdeps/unix/sysv/linux/x86_64/libmvec.abilist: New symbols added. * sysdeps/x86/fpu/bits/math-vector.h: Added SIMD declaration and asm redirections for logf. * sysdeps/x86_64/fpu/Makefile (libmvec-support): Added new files. * sysdeps/x86_64/fpu/Versions: New versions added. * sysdeps/x86_64/fpu/libm-test-ulps: Regenerated. * sysdeps/x86_64/fpu/multiarch/Makefile (libmvec-sysdep_routines): Added build of SSE, AVX2 and AVX512 IFUNC versions. * sysdeps/x86_64/fpu/multiarch/svml_s_logf16_core.S: New file. * sysdeps/x86_64/fpu/multiarch/svml_s_logf16_core_avx512.S: New file. * sysdeps/x86_64/fpu/multiarch/svml_s_logf4_core.S: New file. * sysdeps/x86_64/fpu/multiarch/svml_s_logf4_core_sse4.S: New file. * sysdeps/x86_64/fpu/multiarch/svml_s_logf8_core.S: New file. * sysdeps/x86_64/fpu/multiarch/svml_s_logf8_core_avx2.S: New file. * sysdeps/x86_64/fpu/svml_s_logf16_core.S: New file. * sysdeps/x86_64/fpu/svml_s_logf4_core.S: New file. * sysdeps/x86_64/fpu/svml_s_logf8_core.S: New file. * sysdeps/x86_64/fpu/svml_s_logf8_core_avx.S: New file. * sysdeps/x86_64/fpu/svml_s_logf_data.S: New file. * sysdeps/x86_64/fpu/svml_s_logf_data.h: New file. * sysdeps/x86_64/fpu/test-float-vlen16-wrappers.c: Vector logf tests. * sysdeps/x86_64/fpu/test-float-vlen16.c: Likewise. * sysdeps/x86_64/fpu/test-float-vlen4-wrappers.c: Likewise. * sysdeps/x86_64/fpu/test-float-vlen4.c: Likewise. * sysdeps/x86_64/fpu/test-float-vlen8-avx2-wrappers.c: Likewise. * sysdeps/x86_64/fpu/test-float-vlen8-avx2.c: Likewise. * sysdeps/x86_64/fpu/test-float-vlen8-wrappers.c: Likewise. * sysdeps/x86_64/fpu/test-float-vlen8.c: Likewise. * NEWS: Mention addition of x86_64 vector logf.
Diffstat (limited to 'sysdeps/x86_64/fpu/svml_s_logf_data.S')
-rw-r--r--sysdeps/x86_64/fpu/svml_s_logf_data.S102
1 files changed, 102 insertions, 0 deletions
diff --git a/sysdeps/x86_64/fpu/svml_s_logf_data.S b/sysdeps/x86_64/fpu/svml_s_logf_data.S
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+++ b/sysdeps/x86_64/fpu/svml_s_logf_data.S
@@ -0,0 +1,102 @@
+/* Data for vector function logf.
+ Copyright (C) 2014-2015 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#include "svml_s_logf_data.h"
+
+ .section .rodata, "a"
+ .align 64
+
+/* Data table for vector implementations of function logf.
+ The table may contain polynomial, reduction, lookup coefficients and
+ other coefficients obtained through different methods of research and
+ experimental work. */
+
+ .globl __svml_slog_data
+__svml_slog_data:
+
+/* Polynomial sPoly[] coefficients:
+ * -5.0000000000000000000000000e-01 */
+float_vector _sPoly_1 0xbf000000
+
+/* 3.3336564898490905761718750e-01 */
+float_vector _sPoly_2 0x3eaaaee7
+
+/* -2.5004664063453674316406250e-01 */
+float_vector _sPoly_3 0xbe80061d
+
+/* 1.9822503626346588134765625e-01 */
+float_vector _sPoly_4 0x3e4afb81
+
+/* -1.6462457180023193359375000e-01 */
+float_vector _sPoly_5 0xbe289358
+
+/* 1.6964881122112274169921875e-01 */
+float_vector _sPoly_6 0x3e2db86b
+
+/* -1.5177205204963684082031250e-01 */
+float_vector _sPoly_7 0xbe1b6a22
+
+/* Constant for work range check: Delta 80000000-7f800000 */
+float_vector _iHiDelta 0x00800000
+
+/* Constant for work range check: 00800000 + Delta */
+float_vector _iLoRange 0x01000000
+
+/* Mantissa break point SP 2/3 */
+float_vector _iBrkValue 0x3f2aaaab
+
+/* SP significand mask */
+float_vector _iOffExpoMask 0x007fffff
+
+/* 1.0f */
+float_vector _sOne 0x3f800000
+
+/* SP log(2) */
+float_vector _sLn2 0x3f317218
+
+/* SP infinity, +/- */
+.if .-__svml_slog_data != _sInfs
+.err
+.endif
+ .long 0x7f800000
+ .long 0xff800000
+ .rept 56
+ .byte 0
+ .endr
+
+/* SP one, +/- */
+.if .-__svml_slog_data != _sOnes
+.err
+.endif
+ .long 0x3f800000
+ .long 0xbf800000
+ .rept 56
+ .byte 0
+ .endr
+
+/* SP zero +/- */
+.if .-__svml_slog_data != _sZeros
+.err
+.endif
+ .long 0x00000000
+ .long 0x80000000
+ .rept 56
+ .byte 0
+ .endr
+ .type __svml_slog_data,@object
+ .size __svml_slog_data,.-__svml_slog_data