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| author | H.J. Lu <hjl.tools@gmail.com> | 2015-08-13 03:40:00 -0700 |
|---|---|---|
| committer | H.J. Lu <hjl.tools@gmail.com> | 2015-08-13 03:41:47 -0700 |
| commit | 1dfa4a94aea3249f9c6e577d795df420688cd8e3 (patch) | |
| tree | 3200bfa857e81cf4a3a22593691adf7d84f3e7d2 /sysdeps/x86_64/fpu/multiarch/svml_d_sin4_core.S | |
| parent | 1aee37a22e3977de7a89e734e0a1e112f52045f2 (diff) | |
| download | glibc-1dfa4a94aea3249f9c6e577d795df420688cd8e3.tar.gz | |
Update libmvec multiarch functions for <cpu-features.h>
This patch updates libmvec multiarch functions to use the newly defined
HAS_CPU_FEATURE, HAS_ARCH_FEATURE and LOAD_RTLD_GLOBAL_RO_RDX from
<cpu-features.h>.
* math/Makefile ($(addprefix $(objpfx), $(libm-vec-tests))):
Remove $(objpfx)init-arch.o.
* sysdeps/x86_64/fpu/Makefile (libmvec-support): Remove
init-arch.
* sysdeps/x86_64/fpu/math-tests-arch.h (avx_usable): Removed.
(INIT_ARCH_EXT): Defined as empty.
(CHECK_ARCH_EXT): Replace HAS_XXX with HAS_ARCH_FEATURE (XXX).
* sysdeps/x86_64/fpu/multiarch/svml_d_cos2_core.S: Remove
__init_cpu_features call. Replace HAS_XXX with
HAS_CPU_FEATURE/HAS_ARCH_FEATURE (XXX).
* sysdeps/x86_64/fpu/multiarch/svml_d_cos4_core.S: Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_d_cos8_core.S: Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S: Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_d_exp4_core.S: Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_d_exp8_core.S: Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_d_log2_core.S: Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_d_log4_core.S: Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_d_log8_core.S: Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_d_pow2_core.S: Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_d_pow4_core.S: Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_d_pow8_core.S: Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_d_sin2_core.S: Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_d_sin4_core.S: Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_d_sin8_core.S: Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_d_sincos2_core.S: Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_d_sincos4_core.S: Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_d_sincos8_core.S: Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_s_cosf16_core.S: Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_s_cosf4_core.S: Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_s_cosf8_core.S: Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_s_expf16_core.S: Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_s_expf4_core.S: Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_s_expf8_core.S: Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_s_logf16_core.S: Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_s_logf4_core.S: Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_s_logf8_core.S: Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_s_powf16_core.S: Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_s_powf4_core.S: Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_s_powf8_core.S: Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_s_sincosf16_core.S: Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_s_sincosf4_core.S: Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_s_sincosf8_core.S: Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_s_sinf16_core.S: Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_s_sinf4_core.S: Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_s_sinf8_core.S: Likewise.
Diffstat (limited to 'sysdeps/x86_64/fpu/multiarch/svml_d_sin4_core.S')
| -rw-r--r-- | sysdeps/x86_64/fpu/multiarch/svml_d_sin4_core.S | 8 |
1 files changed, 3 insertions, 5 deletions
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_sin4_core.S b/sysdeps/x86_64/fpu/multiarch/svml_d_sin4_core.S index c3a453a477..17cb5c135e 100644 --- a/sysdeps/x86_64/fpu/multiarch/svml_d_sin4_core.S +++ b/sysdeps/x86_64/fpu/multiarch/svml_d_sin4_core.S @@ -22,11 +22,9 @@ .text ENTRY (_ZGVdN4v_sin) .type _ZGVdN4v_sin, @gnu_indirect_function - cmpl $0, KIND_OFFSET+__cpu_features(%rip) - jne 1f - call __init_cpu_features -1: leaq _ZGVdN4v_sin_avx2(%rip), %rax - testl $bit_AVX2_Usable, __cpu_features+FEATURE_OFFSET+index_AVX2_Usable(%rip) + LOAD_RTLD_GLOBAL_RO_RDX + leaq _ZGVdN4v_sin_avx2(%rip), %rax + HAS_ARCH_FEATURE (AVX2_Usable) jz 2f ret 2: leaq _ZGVdN4v_sin_sse_wrapper(%rip), %rax |