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| author | Florian Weimer <fweimer@redhat.com> | 2021-11-02 10:26:23 +0100 |
|---|---|---|
| committer | Florian Weimer <fweimer@redhat.com> | 2021-11-02 10:26:23 +0100 |
| commit | cca75bd8b53b82d80299b03b368355b158832c9a (patch) | |
| tree | c008ff00a69d3b0210535c38f305bd547c956676 /sysdeps/x86 | |
| parent | b8a6ee43bb814df24f465db5b00a6da0016052cc (diff) | |
| download | glibc-cca75bd8b53b82d80299b03b368355b158832c9a.tar.gz | |
i386: Explain why __HAVE_64B_ATOMICS has to be 0
Diffstat (limited to 'sysdeps/x86')
| -rw-r--r-- | sysdeps/x86/atomic-machine.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/sysdeps/x86/atomic-machine.h b/sysdeps/x86/atomic-machine.h index 695222e4fa..2692d94a92 100644 --- a/sysdeps/x86/atomic-machine.h +++ b/sysdeps/x86/atomic-machine.h @@ -60,6 +60,10 @@ typedef uintmax_t uatomic_max_t; # define BR_CONSTRAINT "q" # define IBR_CONSTRAINT "iq" #else +/* Since the Pentium, i386 CPUs have supported 64-bit atomics, but the + i386 psABI supplement provides only 4-byte alignment for uint64_t + inside structs, so it is currently not possible to use 64-bit + atomics on this platform. */ # define __HAVE_64B_ATOMICS 0 # define SP_REG "esp" # define SEG_REG "gs" |