mips: Fix store/load gp registers to/from ucontext_t

General purpose registers in mcontext_t structure
are 8 bytes long for both MIPS32/MIPS64.

get/set/make/swap context implementations for MIPS O32
incorrectly assume that general purpose registers
in this structure are 4 bytes long.

This patch is fixing that.

Tested for MIPS O32 LE and BE.
Compared objdump of modified functions for mips n32 and mips n64.

	[BZ #21548]
	* sysdeps/unix/sysv/linux/mips/getcontext.S: Define MCONTEXT_SZGREG as
	8 and use it when copying general purpose registers.
	* sysdeps/unix/sysv/linux/mips/makecontext.S: Likewise.
	* sysdeps/unix/sysv/linux/mips/mips32/Makefile: Include new test for
	mips o32.
	* sysdeps/unix/sysv/linux/mips/mips32/bug-getcontext-mips-gp.c: Added
	new test for mips o32.
	* sysdeps/unix/sysv/linux/mips/setcontext.S: Define MCONTEXT_SZGREG as
	8 and use it when copying general purpose registers.
	* sysdeps/unix/sysv/linux/mips/swapcontext.S: Likewise.

1 files changed, 43 insertions, 36 deletions

diff --git a/sysdeps/unix/sysv/linux/mips/swapcontext.S b/sysdeps/unix/sysv/linux/mips/swapcontext.S
index fde6e5e48a..ff63b3d9c8 100644
--- a/sysdeps/unix/sysv/linux/mips/swapcontext.S
+++ b/sysdeps/unix/sysv/linux/mips/swapcontext.S
@@ -47,6 +47,12 @@ A1OFF = FRAMESZ - (1 * SZREG)				/* callee-allocated */
 #else
 A1OFF = FRAMESZ + (1 * SZREG)				/* caller-allocated */
 #endif
+MCONTEXT_GREGSZ = 8
+#if _MIPS_SIM == _ABIO32 && __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
+MCONTEXT_GREGOFF = 4
+#else
+MCONTEXT_GREGOFF = 0
+#endif
 
 NESTED (__swapcontext, FRAMESZ, ra)
 	.mask	MASK, -(ARGSZ * SZREG)
@@ -83,23 +89,24 @@ NESTED (__swapcontext, FRAMESZ, ra)
 
 	/* Store a magic flag.	*/
 	li	v1, 1
-	REG_S	v1, (0 * SZREG + MCONTEXT_GREGS)(a0)	/* zero */
-
-	REG_S	s0, (16 * SZREG + MCONTEXT_GREGS)(a0)
-	REG_S	s1, (17 * SZREG + MCONTEXT_GREGS)(a0)
-	REG_S	s2, (18 * SZREG + MCONTEXT_GREGS)(a0)
-	REG_S	s3, (19 * SZREG + MCONTEXT_GREGS)(a0)
-	REG_S	s4, (20 * SZREG + MCONTEXT_GREGS)(a0)
-	REG_S	s5, (21 * SZREG + MCONTEXT_GREGS)(a0)
-	REG_S	s6, (22 * SZREG + MCONTEXT_GREGS)(a0)
-	REG_S	s7, (23 * SZREG + MCONTEXT_GREGS)(a0)
+	/* zero */
+	REG_S	v1, (MCONTEXT_GREGOFF + 0 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
+
+	REG_S	s0, (MCONTEXT_GREGOFF + 16 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
+	REG_S	s1, (MCONTEXT_GREGOFF + 17 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
+	REG_S	s2, (MCONTEXT_GREGOFF + 18 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
+	REG_S	s3, (MCONTEXT_GREGOFF + 19 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
+	REG_S	s4, (MCONTEXT_GREGOFF + 20 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
+	REG_S	s5, (MCONTEXT_GREGOFF + 21 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
+	REG_S	s6, (MCONTEXT_GREGOFF + 22 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
+	REG_S	s7, (MCONTEXT_GREGOFF + 23 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
 #if ! defined (__PIC__) || _MIPS_SIM != _ABIO32
-	REG_S	_GP, (28 * SZREG + MCONTEXT_GREGS)(a0)
+	REG_S	_GP, (MCONTEXT_GREGOFF + 28 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
 #endif
-	REG_S	_SP, (29 * SZREG + MCONTEXT_GREGS)(a0)
-	REG_S	fp, (30 * SZREG + MCONTEXT_GREGS)(a0)
-	REG_S	ra, (31 * SZREG + MCONTEXT_GREGS)(a0)
-	REG_S	ra, MCONTEXT_PC(a0)
+	REG_S	_SP, (MCONTEXT_GREGOFF + 29 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
+	REG_S	fp, (MCONTEXT_GREGOFF + 30 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
+	REG_S	ra, (MCONTEXT_GREGOFF + 31 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
+	REG_S	ra, (MCONTEXT_GREGOFF + MCONTEXT_PC)(a0)
 
 #ifdef __mips_hard_float
 # if _MIPS_SIM == _ABI64
@@ -167,32 +174,32 @@ NESTED (__swapcontext, FRAMESZ, ra)
 
 	/* Note the contents of argument registers will be random
 	   unless makecontext() has been called.  */
-	REG_L	a0, (4 * SZREG + MCONTEXT_GREGS)(v0)
-	REG_L	a1, (5 * SZREG + MCONTEXT_GREGS)(v0)
-	REG_L	a2, (6 * SZREG + MCONTEXT_GREGS)(v0)
-	REG_L	a3, (7 * SZREG + MCONTEXT_GREGS)(v0)
+	REG_L	a0, (MCONTEXT_GREGOFF + 4 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
+	REG_L	a1, (MCONTEXT_GREGOFF + 5 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
+	REG_L	a2, (MCONTEXT_GREGOFF + 6 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
+	REG_L	a3, (MCONTEXT_GREGOFF + 7 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
 #if _MIPS_SIM != _ABIO32
-	REG_L	a4, (8 * SZREG + MCONTEXT_GREGS)(v0)
-	REG_L	a5, (9 * SZREG + MCONTEXT_GREGS)(v0)
-	REG_L	a6, (10 * SZREG + MCONTEXT_GREGS)(v0)
-	REG_L	a7, (11 * SZREG + MCONTEXT_GREGS)(v0)
+	REG_L	a4, (MCONTEXT_GREGOFF + 8 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
+	REG_L	a5, (MCONTEXT_GREGOFF + 9 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
+	REG_L	a6, (MCONTEXT_GREGOFF + 10 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
+	REG_L	a7, (MCONTEXT_GREGOFF + 11 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
 #endif
 
-	REG_L	s0, (16 * SZREG + MCONTEXT_GREGS)(v0)
-	REG_L	s1, (17 * SZREG + MCONTEXT_GREGS)(v0)
-	REG_L	s2, (18 * SZREG + MCONTEXT_GREGS)(v0)
-	REG_L	s3, (19 * SZREG + MCONTEXT_GREGS)(v0)
-	REG_L	s4, (20 * SZREG + MCONTEXT_GREGS)(v0)
-	REG_L	s5, (21 * SZREG + MCONTEXT_GREGS)(v0)
-	REG_L	s6, (22 * SZREG + MCONTEXT_GREGS)(v0)
-	REG_L	s7, (23 * SZREG + MCONTEXT_GREGS)(v0)
+	REG_L	s0, (MCONTEXT_GREGOFF + 16 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
+	REG_L	s1, (MCONTEXT_GREGOFF + 17 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
+	REG_L	s2, (MCONTEXT_GREGOFF + 18 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
+	REG_L	s3, (MCONTEXT_GREGOFF + 19 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
+	REG_L	s4, (MCONTEXT_GREGOFF + 20 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
+	REG_L	s5, (MCONTEXT_GREGOFF + 21 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
+	REG_L	s6, (MCONTEXT_GREGOFF + 22 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
+	REG_L	s7, (MCONTEXT_GREGOFF + 23 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
 #if ! defined (__PIC__) || _MIPS_SIM != _ABIO32
-	REG_L	gp, (28 * SZREG + MCONTEXT_GREGS)(v0)
+	REG_L	gp, (MCONTEXT_GREGOFF + 28 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
 #endif
-	REG_L	sp, (29 * SZREG + MCONTEXT_GREGS)(v0)
-	REG_L	fp, (30 * SZREG + MCONTEXT_GREGS)(v0)
-	REG_L	ra, (31 * SZREG + MCONTEXT_GREGS)(v0)
-	REG_L	t9, MCONTEXT_PC(v0)
+	REG_L	sp, (MCONTEXT_GREGOFF + 29 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
+	REG_L	fp, (MCONTEXT_GREGOFF + 30 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
+	REG_L	ra, (MCONTEXT_GREGOFF + 31 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
+	REG_L	t9, (MCONTEXT_GREGOFF + MCONTEXT_PC)(v0)
 
 	move	v0, zero
 	jr	t9