Optimize trunc{,f} on sparc.

	* sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile: Add vis3
	trunc{,f} to libm-sysdep_routes.
	* sysdeps/sparc/sparc64/fpu/multiarch/Makefile: Likewise.
	* sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_trunc-vis3.S: New
	file.
	* sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_trunc.S: New file.
	* sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_truncf-vis3.S: New
	file.
	* sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_truncf.S: New
	file.
	* sysdeps/sparc/sparc32/sparcv9/fpu/s_trunc.S: New file.
	* sysdeps/sparc/sparc32/sparcv9/fpu/s_truncf.S: New file.
	* sysdeps/sparc/sparc64/fpu/multiarch/s_trunc-vis3.S: New file.
	* sysdeps/sparc/sparc64/fpu/multiarch/s_trunc.S: New file.
	* sysdeps/sparc/sparc64/fpu/multiarch/s_truncf-vis3.S: New file.
	* sysdeps/sparc/sparc64/fpu/multiarch/s_truncf.S: New file.
	* sysdeps/sparc/sparc64/fpu/s_trunc.S: New file.
	* sysdeps/sparc/sparc64/fpu/s_truncf.S: New file.

7 files changed, 240 insertions, 1 deletions

diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/Makefile b/sysdeps/sparc/sparc64/fpu/multiarch/Makefile
index eff225ea4e..6a9274b4fa 100644
--- a/sysdeps/sparc/sparc64/fpu/multiarch/Makefile
+++ b/sysdeps/sparc/sparc64/fpu/multiarch/Makefile
@@ -9,7 +9,8 @@ libm-sysdep_routines += m_signbitf-vis3 m_signbit-vis3 s_ceilf-vis3 \
 			s_lrintf-vis3 s_lrint-vis3 s_rintf-vis3 \
 			s_rint-vis3 s_fminf-vis3 s_fmin-vis3 \
 			s_fmaxf-vis3 s_fmax-vis3 s_fmaf-vis3 \
-			s_fma-vis3 s_nearbyint-vis3 s_nearbyintf-vis3
+			s_fma-vis3 s_nearbyint-vis3 s_nearbyintf-vis3 \
+			s_truncf-vis3 s_trunc-vis3
 sysdep_routines += s_signbitf-vis3 s_signbit-vis3 s_finitef-vis3 \
 		   s_finite-vis3 s_isinff-vis3 s_isinf-vis3 \
 		   s_isnanf-vis3 s_isnan-vis3
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_trunc-vis3.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_trunc-vis3.S
new file mode 100644
index 0000000000..34ff42da83
--- /dev/null
+++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_trunc-vis3.S
@@ -0,0 +1,53 @@
+/* Truncate argument to nearest integral value not larger than
+   the argument, sparc64 vis3 version.
+
+   Copyright (C) 2013 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+   Contributed by David S. Miller <davem@davemloft.net>, 2013.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <sysdep.h>
+
+	/* We pop constants into the FPU registers using the incoming
+	   argument stack slots, since this avoid having to use any PIC
+	   references.  We also thus avoid having to allocate a register
+	   window.
+
+	   VIS instructions are used to facilitate the formation of
+	   easier constants, and the propagation of the sign bit.  */
+
+#define TWO_FIFTYTWO	0x43300000		/* 2**52 */
+
+#define ZERO		%f10			/* 0.0 */
+#define SIGN_BIT	%f12			/* -0.0 */
+
+ENTRY (__trunc_vis3)
+	sethi	%hi(TWO_FIFTYTWO), %o2
+	sllx	%o2, 32, %o2
+	fzero	ZERO
+	fnegd	ZERO, SIGN_BIT
+	movxtod	%o2, %f16
+	fabsd	%f0, %f14
+	fcmpd	%fcc3, %f14, %f16
+	fmovduge %fcc3, ZERO, %f14
+	fand	%f0, SIGN_BIT, SIGN_BIT
+	fdtox	%f14, %f14
+	fxtod	%f14, %f14
+	faddd	%f0, ZERO, %f18
+	fmovduge %fcc3, %f18, %f14
+	retl
+	 for	%f14, SIGN_BIT, %f0
+END (__trunc_vis3)
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_trunc.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_trunc.S
new file mode 100644
index 0000000000..0d6f43a189
--- /dev/null
+++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_trunc.S
@@ -0,0 +1,12 @@
+#include <sparc-ifunc.h>
+
+SPARC_ASM_VIS3_IFUNC(trunc)
+
+weak_alias (__trunc, trunc)
+
+# undef weak_alias
+# define weak_alias(a, b)
+
+#define __trunc __trunc_generic
+
+#include "../s_trunc.S"
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_truncf-vis3.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_truncf-vis3.S
new file mode 100644
index 0000000000..e566b6ba82
--- /dev/null
+++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_truncf-vis3.S
@@ -0,0 +1,52 @@
+/* Truncate argument to nearest integral value not larger than
+   the argument, sparc64 vis3 version.
+
+   Copyright (C) 2013 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+   Contributed by David S. Miller <davem@davemloft.net>, 2013.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <sysdep.h>
+
+	/* We pop constants into the FPU registers using the incoming
+	   argument stack slots, since this avoid having to use any PIC
+	   references.  We also thus avoid having to allocate a register
+	   window.
+
+	   VIS instructions are used to facilitate the formation of
+	   easier constants, and the propagation of the sign bit.  */
+
+#define TWO_TWENTYTHREE	0x4b000000		/* 2**23 */
+
+#define ZERO		%f10			/* 0.0 */
+#define SIGN_BIT	%f12			/* -0.0 */
+
+ENTRY (__truncf_vis3)
+	sethi	%hi(TWO_TWENTYTHREE), %o2
+	fzeros	ZERO
+	fnegs	ZERO, SIGN_BIT
+	movwtos	%o2,%f16
+	fabss	%f1, %f14
+	fcmps	%fcc3, %f14, %f16
+	fmovsuge %fcc3, ZERO, %f14
+	fands	%f1, SIGN_BIT, SIGN_BIT
+	fstoi	%f14, %f14
+	fitos	%f14, %f14
+	fadds	%f1, ZERO, %f18
+	fmovsuge %fcc3, %f18, %f14
+	retl
+	 fors	%f14, SIGN_BIT, %f0
+END (__truncf_vis3)
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_truncf.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_truncf.S
new file mode 100644
index 0000000000..2ca2517334
--- /dev/null
+++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_truncf.S
@@ -0,0 +1,12 @@
+#include <sparc-ifunc.h>
+
+SPARC_ASM_VIS3_IFUNC(truncf)
+
+weak_alias (__truncf, truncf)
+
+# undef weak_alias
+# define weak_alias(a, b)
+
+#define __truncf __truncf_generic
+
+#include "../s_truncf.S"
diff --git a/sysdeps/sparc/sparc64/fpu/s_trunc.S b/sysdeps/sparc/sparc64/fpu/s_trunc.S
new file mode 100644
index 0000000000..13d47eb97b
--- /dev/null
+++ b/sysdeps/sparc/sparc64/fpu/s_trunc.S
@@ -0,0 +1,55 @@
+/* Truncate argument to nearest integral value not larger than
+   the argument, sparc64 version.
+
+   Copyright (C) 2013 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+   Contributed by David S. Miller <davem@davemloft.net>, 2013.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <sysdep.h>
+
+	/* We pop constants into the FPU registers using the incoming
+	   argument stack slots, since this avoid having to use any PIC
+	   references.  We also thus avoid having to allocate a register
+	   window.
+
+	   VIS instructions are used to facilitate the formation of
+	   easier constants, and the propagation of the sign bit.  */
+
+#define TWO_FIFTYTWO	0x43300000		/* 2**52 */
+
+#define ZERO		%f10			/* 0.0 */
+#define SIGN_BIT	%f12			/* -0.0 */
+
+ENTRY (__trunc)
+	sethi	%hi(TWO_FIFTYTWO), %o2
+	sllx	%o2, 32, %o2
+	fzero	ZERO
+	fnegd	ZERO, SIGN_BIT
+	stx	%o2, [%sp + STACK_BIAS + 128]
+	fabsd	%f0, %f14
+	ldd	[%sp + STACK_BIAS + 128], %f16
+	fcmpd	%fcc3, %f14, %f16
+	fmovduge %fcc3, ZERO, %f14
+	fand	%f0, SIGN_BIT, SIGN_BIT
+	fdtox	%f14, %f14
+	fxtod	%f14, %f14
+	faddd	%f0, ZERO, %f18
+	fmovduge %fcc3, %f18, %f14
+	retl
+	 for	%f14, SIGN_BIT, %f0
+END (__trunc)
+weak_alias (__trunc, trunc)
diff --git a/sysdeps/sparc/sparc64/fpu/s_truncf.S b/sysdeps/sparc/sparc64/fpu/s_truncf.S
new file mode 100644
index 0000000000..e25a1f595e
--- /dev/null
+++ b/sysdeps/sparc/sparc64/fpu/s_truncf.S
@@ -0,0 +1,54 @@
+/* Truncate argument to nearest integral value not larger than
+   the argument, sparc64 version.
+
+   Copyright (C) 2013 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+   Contributed by David S. Miller <davem@davemloft.net>, 2013.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <sysdep.h>
+
+	/* We pop constants into the FPU registers using the incoming
+	   argument stack slots, since this avoid having to use any PIC
+	   references.  We also thus avoid having to allocate a register
+	   window.
+
+	   VIS instructions are used to facilitate the formation of
+	   easier constants, and the propagation of the sign bit.  */
+
+#define TWO_TWENTYTHREE	0x4b000000		/* 2**23 */
+
+#define ZERO		%f10			/* 0.0 */
+#define SIGN_BIT	%f12			/* -0.0 */
+
+ENTRY (__truncf)
+	sethi	%hi(TWO_TWENTYTHREE), %o2
+	fzeros	ZERO
+	fnegs	ZERO, SIGN_BIT
+	st	%o2, [%sp + STACK_BIAS + 128]
+	fabss	%f1, %f14
+	ld	[%sp + STACK_BIAS + 128], %f16
+	fcmps	%fcc3, %f14, %f16
+	fmovsuge %fcc3, ZERO, %f14
+	fands	%f1, SIGN_BIT, SIGN_BIT
+	fstoi	%f14, %f14
+	fitos	%f14, %f14
+	fadds	%f1, ZERO, %f18
+	fmovsuge %fcc3, %f18, %f14
+	retl
+	 fors	%f14, SIGN_BIT, %f0
+END (__truncf)
+weak_alias (__truncf, truncf)