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authorDavid S. Miller <davem@davemloft.net>2012-03-14 16:29:47 -0700
committerDavid S. Miller <davem@davemloft.net>2012-03-14 16:43:09 -0700
commiteae47a361821b60ad4274feae1d6e3fa4572cd0a (patch)
tree00abf7a0cd073fc519d074d18f1163a8f47ee0c2 /sysdeps/sparc/sparc64/fpu/multiarch/s_signbit.S
parent7bd951ff59e0443ca1bdd5b0ea58f6f4f641ac73 (diff)
downloadglibc-eae47a361821b60ad4274feae1d6e3fa4572cd0a.tar.gz
Add framework for using sparc VIS3 instructions, use it for copysign/signbit.
* sysdeps/sparc/configure.in: New file. * sysdeps/sparc/configure: Generate. * configure.in (libc_cv_sparc_as_vis3): Substitute. * configure: Regenerate. * config.h.in (HAVE_AS_VIS3_SUPPORT): New. * config.make.in (have-as-vis3): New. * sysdeps/sparc/sparc32/sparcv9/Makefile (ASFLAGS-*): If VIS3 is available use -Av9d instead of -Av9a. * sysdeps/sparc/sparc64/Makefile: Likewise. * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile: New file. * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_copysign-vis3.S: New file. * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_copysign.S: New file. * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_copysignf-vis3.S: New file. * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_copysignf.S: New file. * sysdeps/sparc/sparc64/fpu/multiarch/Makefile: New file. * sysdeps/sparc/sparc64/fpu/multiarch/s_signbit-vis3.S: New file. * sysdeps/sparc/sparc64/fpu/multiarch/s_signbit.S: New file. * sysdeps/sparc/sparc64/fpu/multiarch/s_signbitf-vis3.S: New file. * sysdeps/sparc/sparc64/fpu/multiarch/s_signbitf.S: New file.
Diffstat (limited to 'sysdeps/sparc/sparc64/fpu/multiarch/s_signbit.S')
-rw-r--r--sysdeps/sparc/sparc64/fpu/multiarch/s_signbit.S57
1 files changed, 57 insertions, 0 deletions
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_signbit.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_signbit.S
new file mode 100644
index 0000000000..a8e9728935
--- /dev/null
+++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_signbit.S
@@ -0,0 +1,57 @@
+#include <sysdep.h>
+
+ .text
+ENTRY(__signbit)
+ .type __signbit, @gnu_indirect_function
+# ifdef SHARED
+ SETUP_PIC_REG_LEAF(o3, o5)
+# endif
+# ifdef HAVE_AS_VIS3_SUPPORT
+ set HWCAP_SPARC_VIS3, %o1
+ andcc %o0, %o1, %g0
+ be 9f
+ nop
+# ifdef SHARED
+ sethi %gdop_hix22(__signbit_vis3), %o1
+ xor %o1, %gdop_lox10(__signbit_vis3), %o1
+# else
+ set __signbit_vis3, %o1
+# endif
+ ba 10f
+ nop
+9:
+# endif
+# ifdef SHARED
+ sethi %gdop_hix22(__signbit_generic), %o1
+ xor %o1, %gdop_lox10(__signbit_generic), %o1
+# else
+ set __signbit_generic, %o1
+# endif
+# ifdef HAVE_AS_VIS3_SUPPORT
+10:
+# endif
+# ifdef SHARED
+ add %o3, %o1, %o1
+# endif
+ retl
+ mov %o1, %o0
+END(__signbit)
+weak_alias (__signbit, signbit)
+
+/* On 64-bit the double version will also always work for
+ long-double-precision since in both cases the word with the
+ sign bit in it is passed always in register %f0. */
+strong_alias (__signbit, __signbitl)
+hidden_def (__signbitl)
+weak_alias (__signbitl, signbitl)
+
+# undef weak_alias
+# define weak_alias(a, b)
+# undef strong_alias
+# define strong_alias(a, b)
+# undef hidden_def
+# define hidden_def(a)
+
+#define __signbit __signbit_generic
+
+#include "../s_signbit.S"