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| author | Adhemerval Zanella <azanella@linux.vnet.ibm.com> | 2014-11-05 08:01:09 -0500 |
|---|---|---|
| committer | Adhemerval Zanella <azanella@linux.vnet.ibm.com> | 2014-11-05 08:01:09 -0500 |
| commit | 7110166d4fe36899c5ecf6fd31635f3cd75d8931 (patch) | |
| tree | 4390afaaae658b72373d4b62c05abb6ce0a141ae /sysdeps/powerpc/powerpc64/power8/fpu | |
| parent | 29955b5d9658b02d3a678d1f785db3d1e63184ca (diff) | |
| download | glibc-7110166d4fe36899c5ecf6fd31635f3cd75d8931.tar.gz | |
powerpc: Simplify encoding of POWER8 instruction
Diffstat (limited to 'sysdeps/powerpc/powerpc64/power8/fpu')
| -rw-r--r-- | sysdeps/powerpc/powerpc64/power8/fpu/s_finite.S | 7 | ||||
| -rw-r--r-- | sysdeps/powerpc/powerpc64/power8/fpu/s_isinf.S | 7 | ||||
| -rw-r--r-- | sysdeps/powerpc/powerpc64/power8/fpu/s_isnan.S | 7 | ||||
| -rw-r--r-- | sysdeps/powerpc/powerpc64/power8/fpu/s_llrint.S | 7 | ||||
| -rw-r--r-- | sysdeps/powerpc/powerpc64/power8/fpu/s_llround.S | 6 |
5 files changed, 5 insertions, 29 deletions
diff --git a/sysdeps/powerpc/powerpc64/power8/fpu/s_finite.S b/sysdeps/powerpc/powerpc64/power8/fpu/s_finite.S index 2b27e7b923..3e981265ab 100644 --- a/sysdeps/powerpc/powerpc64/power8/fpu/s_finite.S +++ b/sysdeps/powerpc/powerpc64/power8/fpu/s_finite.S @@ -17,14 +17,9 @@ <http://www.gnu.org/licenses/>. */ #include <sysdep.h> -#include <endian.h> #include <math_ldbl_opt.h> -#if __BYTE_ORDER == __LITTLE_ENDIAN -#define MFVSRD_R3_V1 .byte 0x66,0x00,0x23,0x7c /* mfvsrd r3,vs1 */ -#else -#define MFVSRD_R3_V1 .byte 0x7c,0x23,0x00,0x66 /* mfvsrd r3,vs1 */ -#endif +#define MFVSRD_R3_V1 .long 0x7c230066 /* mfvsrd r3,vs1 */ /* int [r3] __finite ([fp1] x) */ diff --git a/sysdeps/powerpc/powerpc64/power8/fpu/s_isinf.S b/sysdeps/powerpc/powerpc64/power8/fpu/s_isinf.S index d09b7fcef9..125de3943d 100644 --- a/sysdeps/powerpc/powerpc64/power8/fpu/s_isinf.S +++ b/sysdeps/powerpc/powerpc64/power8/fpu/s_isinf.S @@ -17,14 +17,9 @@ <http://www.gnu.org/licenses/>. */ #include <sysdep.h> -#include <endian.h> #include <math_ldbl_opt.h> -#if __BYTE_ORDER == __LITTLE_ENDIAN -#define MFVSRD_R3_V1 .byte 0x66,0x00,0x23,0x7c /* mfvsrd r3,vs1 */ -#else -#define MFVSRD_R3_V1 .byte 0x7c,0x23,0x00,0x66 /* mfvsrd r3,vs1 */ -#endif +#define MFVSRD_R3_V1 .long 0x7c230066 /* mfvsrd r3,vs1 */ /* int [r3] __isinf([fp1] x) */ diff --git a/sysdeps/powerpc/powerpc64/power8/fpu/s_isnan.S b/sysdeps/powerpc/powerpc64/power8/fpu/s_isnan.S index cf119e5c98..2c7b2d1d9a 100644 --- a/sysdeps/powerpc/powerpc64/power8/fpu/s_isnan.S +++ b/sysdeps/powerpc/powerpc64/power8/fpu/s_isnan.S @@ -17,14 +17,9 @@ <http://www.gnu.org/licenses/>. */ #include <sysdep.h> -#include <endian.h> #include <math_ldbl_opt.h> -#if __BYTE_ORDER == __LITTLE_ENDIAN -#define MFVSRD_R3_V1 .byte 0x66,0x00,0x23,0x7c /* mfvsrd r3,vs1 */ -#else -#define MFVSRD_R3_V1 .byte 0x7c,0x23,0x00,0x66 /* mfvsrd r3,vs1 */ -#endif +#define MFVSRD_R3_V1 .long 0x7c230066 /* mfvsrd r3,vs1 */ /* int [r3] __isnan([f1] x) */ diff --git a/sysdeps/powerpc/powerpc64/power8/fpu/s_llrint.S b/sysdeps/powerpc/powerpc64/power8/fpu/s_llrint.S index 9a55d93875..ce48d4e52c 100644 --- a/sysdeps/powerpc/powerpc64/power8/fpu/s_llrint.S +++ b/sysdeps/powerpc/powerpc64/power8/fpu/s_llrint.S @@ -17,14 +17,9 @@ <http://www.gnu.org/licenses/>. */ #include <sysdep.h> -#include <endian.h> #include <math_ldbl_opt.h> -#if __BYTE_ORDER == __LITTLE_ENDIAN -#define MFVSRD_R3_V1 .byte 0x66,0x00,0x23,0x7c /* mfvsrd r3,vs1 */ -#else -#define MFVSRD_R3_V1 .byte 0x7c,0x23,0x00,0x66 /* mfvsrd r3,vs1 */ -#endif +#define MFVSRD_R3_V1 .long 0x7c230066 /* mfvsrd r3,vs1 */ /* long long int[r3] __llrint (double x[fp1]) */ ENTRY (__llrint) diff --git a/sysdeps/powerpc/powerpc64/power8/fpu/s_llround.S b/sysdeps/powerpc/powerpc64/power8/fpu/s_llround.S index f10c06a36c..17cf30eaf1 100644 --- a/sysdeps/powerpc/powerpc64/power8/fpu/s_llround.S +++ b/sysdeps/powerpc/powerpc64/power8/fpu/s_llround.S @@ -20,11 +20,7 @@ #include <endian.h> #include <math_ldbl_opt.h> -#if __BYTE_ORDER == __LITTLE_ENDIAN -#define MFVSRD_R3_V1 .byte 0x66,0x00,0x23,0x7c /* mfvsrd r3,vs1 */ -#else -#define MFVSRD_R3_V1 .byte 0x7c,0x23,0x00,0x66 /* mfvsrd r3,vs1 */ -#endif +#define MFVSRD_R3_V1 .long 0x7c230066 /* mfvsrd r3,vs1 */ /* long long [r3] llround (float x [fp1]) */ |