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| author | Joseph Myers <joseph@codesourcery.com> | 2016-05-25 16:53:23 +0000 |
|---|---|---|
| committer | Joseph Myers <joseph@codesourcery.com> | 2016-05-25 16:53:23 +0000 |
| commit | 1f921a93e4fd0b5ccd18a3e7d5a0511bcd2464fa (patch) | |
| tree | 1588fa3f1a537225dacbe7efc5c8512b094a5e52 /sysdeps/powerpc/powerpc32/fpu/s_ceilf.S | |
| parent | 7ab1de21067d72460ac14089bf6541b10fc14c80 (diff) | |
| download | glibc-1f921a93e4fd0b5ccd18a3e7d5a0511bcd2464fa.tar.gz | |
Do not raise "inexact" from powerpc32 ceil, floor, trunc (bug 15479).
Continuing fixes for ceil, floor and trunc functions not to raise the
"inexact" exception, this patch fixes the versions used on older
powerpc32 processors. As was done with the round implementations some
time ago, the save of floating-point state is moved after the first
floating-point operation on the input to ensure that any "invalid"
exception from signaling NaN input is included in the saved state, and
then the whole state gets restored rather than just the rounding mode.
This has no effect on configurations using the power5+ code, since
such processors can do these operations with a single instruction (and
those instructions do not set "inexact", so are correct for TS 18661-1
semantics).
Tested for powerpc32.
[BZ #15479]
* sysdeps/powerpc/powerpc32/fpu/s_ceil.S (__ceil): Move save of
floating-point state after first floating-point operation on
input. Restore full floating-point state instead of just rounding
mode.
* sysdeps/powerpc/powerpc32/fpu/s_ceilf.S (__ceilf): Likewise.
* sysdeps/powerpc/powerpc32/fpu/s_floor.S (__floor): Likewise.
* sysdeps/powerpc/powerpc32/fpu/s_floorf.S (__floorf): Likewise.
* sysdeps/powerpc/powerpc32/fpu/s_trunc.S (__trunc): Likewise.
* sysdeps/powerpc/powerpc32/fpu/s_truncf.S (__truncf): Likewise.
Diffstat (limited to 'sysdeps/powerpc/powerpc32/fpu/s_ceilf.S')
| -rw-r--r-- | sysdeps/powerpc/powerpc32/fpu/s_ceilf.S | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/sysdeps/powerpc/powerpc32/fpu/s_ceilf.S b/sysdeps/powerpc/powerpc32/fpu/s_ceilf.S index c70fd444e2..3987e24e41 100644 --- a/sysdeps/powerpc/powerpc32/fpu/s_ceilf.S +++ b/sysdeps/powerpc/powerpc32/fpu/s_ceilf.S @@ -25,7 +25,6 @@ .section ".text" ENTRY (__ceilf) - mffs fp11 /* Save current FPU rounding mode. */ #ifdef SHARED mflr r11 cfi_register(lr,r11) @@ -41,6 +40,8 @@ ENTRY (__ceilf) fabs fp0,fp1 fsubs fp12,fp13,fp13 /* generate 0.0 */ fcmpu cr7,fp0,fp13 /* if (fabs(x) > TWO23) */ + mffs fp11 /* Save current FPU rounding mode and + "inexact" state. */ fcmpu cr6,fp1,fp12 /* if (x > 0.0) */ bnllr- cr7 mtfsfi 7,2 /* Set rounding mode toward +inf. */ @@ -49,7 +50,8 @@ ENTRY (__ceilf) fsubs fp1,fp1,fp13 /* x-= TWO23; */ fabs fp1,fp1 /* if (x == 0.0) */ /* x = 0.0; */ - mtfsf 0x01,fp11 /* restore previous rounding mode. */ + mtfsf 0xff,fp11 /* Restore previous rounding mode and + "inexact" state. */ blr .L4: bge- cr6,.L9 /* if (x < 0.0) */ @@ -58,7 +60,8 @@ ENTRY (__ceilf) fnabs fp1,fp1 /* if (x == 0.0) */ /* x = -0.0; */ .L9: - mtfsf 0x01,fp11 /* restore previous rounding mode. */ + mtfsf 0xff,fp11 /* Restore previous rounding mode and + "inexact" state. */ blr END (__ceilf) |