summaryrefslogtreecommitdiff
path: root/sysdeps/arm/bits/atomic.h
diff options
context:
space:
mode:
authorJoseph Myers <joseph@codesourcery.com>2014-02-08 01:49:39 +0000
committerJoseph Myers <joseph@codesourcery.com>2014-02-08 01:49:39 +0000
commitc6bfe5c4d756913297db03f55e42016d1c48918c (patch)
tree898d2910ef903f46b596ad54e519ed4495357766 /sysdeps/arm/bits/atomic.h
parent852fa2dd3aa1a687780e27300df9eb0bdc433863 (diff)
downloadglibc-c6bfe5c4d756913297db03f55e42016d1c48918c.tar.gz
Move arm from ports to libc.
I've moved the ARM port from ports to the main sysdeps hierarchy. Beyond the README update, the move of the files was simply git mv ports/sysdeps/arm sysdeps/arm git mv ports/sysdeps/unix/arm sysdeps/unix/arm git mv ports/sysdeps/unix/sysv/linux/arm sysdeps/unix/sysv/linux/arm and in addition to the ChangeLog entries here, I put a note at the top of ports/ChangeLog.arm similar to that at the top of ChangeLog.powerpc. There is deliberately no NEWS change, as I think it makes the most sense to put in a general note above all ports having moved if we can achieve that for 2.20. Tested that disassembly of installed shared libraries for arm is the same before and after this patch, except for data (not instructions) in ld.so (there are assertions in sysdeps/arm/dl-machine.h, and the path by which that file is found, and so by which it appears in the assertion message, changes as a result of the move). * sysdeps/arm: Move directory from ports/sysdeps/arm. * sysdeps/unix/arm: Move directory from ports/sysdeps/unix/arm. * sysdeps/unix/sysv/linux/arm: Move directory from ports/sysdeps/unix/sysv/linux/arm. * README: Update listing for arm-*-linux-gnueabi. ports/ChangeLog.arm: * sysdeps/arm: Move directory to ../sysdeps/arm. * sysdeps/unix/arm: Move directory to ../sysdeps.arm. * sysdeps/unix/sysv/linux/arm: Move directory to ../sysdeps/unix/sysv/linux/arm.
Diffstat (limited to 'sysdeps/arm/bits/atomic.h')
-rw-r--r--sysdeps/arm/bits/atomic.h159
1 files changed, 159 insertions, 0 deletions
diff --git a/sysdeps/arm/bits/atomic.h b/sysdeps/arm/bits/atomic.h
new file mode 100644
index 0000000000..c2d5be5703
--- /dev/null
+++ b/sysdeps/arm/bits/atomic.h
@@ -0,0 +1,159 @@
+/* Atomic operations. Pure ARM version.
+ Copyright (C) 2002-2014 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library. If not, see
+ <http://www.gnu.org/licenses/>. */
+
+#include <stdint.h>
+
+typedef int8_t atomic8_t;
+typedef uint8_t uatomic8_t;
+typedef int_fast8_t atomic_fast8_t;
+typedef uint_fast8_t uatomic_fast8_t;
+
+typedef int32_t atomic32_t;
+typedef uint32_t uatomic32_t;
+typedef int_fast32_t atomic_fast32_t;
+typedef uint_fast32_t uatomic_fast32_t;
+
+typedef intptr_t atomicptr_t;
+typedef uintptr_t uatomicptr_t;
+typedef intmax_t atomic_max_t;
+typedef uintmax_t uatomic_max_t;
+
+void __arm_link_error (void);
+
+#ifdef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4
+# define atomic_full_barrier() __sync_synchronize ()
+#else
+# define atomic_full_barrier() __arm_assisted_full_barrier ()
+#endif
+
+/* An OS-specific bits/atomic.h file will define this macro if
+ the OS can provide something. If not, we'll fail to build
+ with a compiler that doesn't supply the operation. */
+#ifndef __arm_assisted_full_barrier
+# define __arm_assisted_full_barrier() __arm_link_error()
+#endif
+
+/* Use the atomic builtins provided by GCC in case the backend provides
+ a pattern to do this efficiently. */
+#if __GNUC_PREREQ (4, 7) && defined __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4
+
+# define atomic_exchange_acq(mem, value) \
+ __atomic_val_bysize (__arch_exchange, int, mem, value, __ATOMIC_ACQUIRE)
+
+# define atomic_exchange_rel(mem, value) \
+ __atomic_val_bysize (__arch_exchange, int, mem, value, __ATOMIC_RELEASE)
+
+/* Atomic exchange (without compare). */
+
+# define __arch_exchange_8_int(mem, newval, model) \
+ (__arm_link_error (), (typeof (*mem)) 0)
+
+# define __arch_exchange_16_int(mem, newval, model) \
+ (__arm_link_error (), (typeof (*mem)) 0)
+
+# define __arch_exchange_32_int(mem, newval, model) \
+ __atomic_exchange_n (mem, newval, model)
+
+# define __arch_exchange_64_int(mem, newval, model) \
+ (__arm_link_error (), (typeof (*mem)) 0)
+
+/* Compare and exchange with "acquire" semantics, ie barrier after. */
+
+# define atomic_compare_and_exchange_bool_acq(mem, new, old) \
+ __atomic_bool_bysize (__arch_compare_and_exchange_bool, int, \
+ mem, new, old, __ATOMIC_ACQUIRE)
+
+# define atomic_compare_and_exchange_val_acq(mem, new, old) \
+ __atomic_val_bysize (__arch_compare_and_exchange_val, int, \
+ mem, new, old, __ATOMIC_ACQUIRE)
+
+/* Compare and exchange with "release" semantics, ie barrier before. */
+
+# define atomic_compare_and_exchange_bool_rel(mem, new, old) \
+ __atomic_bool_bysize (__arch_compare_and_exchange_bool, int, \
+ mem, new, old, __ATOMIC_RELEASE)
+
+# define atomic_compare_and_exchange_val_rel(mem, new, old) \
+ __atomic_val_bysize (__arch_compare_and_exchange_val, int, \
+ mem, new, old, __ATOMIC_RELEASE)
+
+/* Compare and exchange.
+ For all "bool" routines, we return FALSE if exchange succesful. */
+
+# define __arch_compare_and_exchange_bool_8_int(mem, newval, oldval, model) \
+ ({__arm_link_error (); oldval; })
+
+# define __arch_compare_and_exchange_bool_16_int(mem, newval, oldval, model) \
+ ({__arm_link_error (); oldval; })
+
+# define __arch_compare_and_exchange_bool_32_int(mem, newval, oldval, model) \
+ ({ \
+ typeof (*mem) __oldval = (oldval); \
+ !__atomic_compare_exchange_n (mem, (void *) &__oldval, newval, 0, \
+ model, __ATOMIC_RELAXED); \
+ })
+
+# define __arch_compare_and_exchange_bool_64_int(mem, newval, oldval, model) \
+ ({__arm_link_error (); oldval; })
+
+# define __arch_compare_and_exchange_val_8_int(mem, newval, oldval, model) \
+ ({__arm_link_error (); oldval; })
+
+# define __arch_compare_and_exchange_val_16_int(mem, newval, oldval, model) \
+ ({__arm_link_error (); oldval; })
+
+# define __arch_compare_and_exchange_val_32_int(mem, newval, oldval, model) \
+ ({ \
+ typeof (*mem) __oldval = (oldval); \
+ __atomic_compare_exchange_n (mem, (void *) &__oldval, newval, 0, \
+ model, __ATOMIC_RELAXED); \
+ __oldval; \
+ })
+
+# define __arch_compare_and_exchange_val_64_int(mem, newval, oldval, model) \
+ ({__arm_link_error (); oldval; })
+
+#elif defined __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4
+/* Atomic compare and exchange. */
+# define __arch_compare_and_exchange_val_32_acq(mem, newval, oldval) \
+ __sync_val_compare_and_swap ((mem), (oldval), (newval))
+#else
+# define __arch_compare_and_exchange_val_32_acq(mem, newval, oldval) \
+ __arm_assisted_compare_and_exchange_val_32_acq ((mem), (newval), (oldval))
+#endif
+
+#if !__GNUC_PREREQ (4, 7) || !defined (__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4)
+/* We don't support atomic operations on any non-word types.
+ So make them link errors. */
+# define __arch_compare_and_exchange_val_8_acq(mem, newval, oldval) \
+ ({ __arm_link_error (); oldval; })
+
+# define __arch_compare_and_exchange_val_16_acq(mem, newval, oldval) \
+ ({ __arm_link_error (); oldval; })
+
+# define __arch_compare_and_exchange_val_64_acq(mem, newval, oldval) \
+ ({ __arm_link_error (); oldval; })
+#endif
+
+/* An OS-specific bits/atomic.h file will define this macro if
+ the OS can provide something. If not, we'll fail to build
+ with a compiler that doesn't supply the operation. */
+#ifndef __arm_assisted_compare_and_exchange_val_32_acq
+# define __arm_assisted_compare_and_exchange_val_32_acq(mem, newval, oldval) \
+ ({ __arm_link_error (); oldval; })
+#endif