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| author | Zack Weinberg <zackw@panix.com> | 2017-05-11 20:36:15 -0400 |
|---|---|---|
| committer | Zack Weinberg <zackw@panix.com> | 2017-05-20 08:12:11 -0400 |
| commit | 81cb7a0b2b6b905a504b8b56fe3c1634adf8fb71 (patch) | |
| tree | ed0a4b6153ee727aca95aadfb8b9061cd873ca7e /sysdeps/arm/add_n.S | |
| parent | 42a844c6a213f9219a4baa013c7305679d5dcaaa (diff) | |
| download | glibc-81cb7a0b2b6b905a504b8b56fe3c1634adf8fb71.tar.gz | |
Remove sfi_* annotations from ARM assembly files.
This semi-mechanical patch removes all uses and definitions of the
sfi_breg, sfi_pld, and sfi_sp macros from various ARM-specific
assembly files. These were only used by NaCl.
* sysdeps/arm/sysdep.h
(ARM_SFI_MACROS, sfi_breg, sfi_pld, sfi_sp): Delete definitions.
* sysdeps/arm/__longjmp.S, sysdeps/arm/add_n.S
* sysdeps/arm/addmul_1.S, sysdeps/arm/arm-mcount.S
* sysdeps/arm/armv6/rawmemchr.S, sysdeps/arm/armv6/strchr.S
* sysdeps/arm/armv6/strcpy.S, sysdeps/arm/armv6/strlen.S
* sysdeps/arm/armv6/strrchr.S, sysdeps/arm/armv6t2/memchr.S
* sysdeps/arm/armv6t2/strlen.S
* sysdeps/arm/armv7/multiarch/memcpy_impl.S
* sysdeps/arm/armv7/strcmp.S, sysdeps/arm/dl-tlsdesc.S
* sysdeps/arm/memcpy.S, sysdeps/arm/memmove.S
* sysdeps/arm/memset.S, sysdeps/arm/setjmp.S
* sysdeps/arm/strlen.S, sysdeps/arm/submul_1.S:
Remove all uses of sfi_breg, sfi_pld, and sfi_sp.
Diffstat (limited to 'sysdeps/arm/add_n.S')
| -rw-r--r-- | sysdeps/arm/add_n.S | 27 |
1 files changed, 9 insertions, 18 deletions
diff --git a/sysdeps/arm/add_n.S b/sysdeps/arm/add_n.S index b601357e64..811a769959 100644 --- a/sysdeps/arm/add_n.S +++ b/sysdeps/arm/add_n.S @@ -52,40 +52,31 @@ ENTRY (FUNC) add lr, r1, r3, lsl #2 /* compute end src1 */ beq 1f - sfi_breg r1, \ - ldr r4, [\B], #4 /* do one to make count even */ - sfi_breg r2, \ - ldr r5, [\B], #4 + ldr r4, [r1], #4 /* do one to make count even */ + ldr r5, [r2], #4 OPC r4, r4, r5 teq r1, lr /* end of count? (preserve carry) */ - sfi_breg r0, \ - str r4, [\B], #4 + str r4, [r0], #4 beq 9f 1: tst r3, #2 /* count & 2 == 2? */ beq 2f - sfi_breg r1, \ - ldm \B!, { r4, r5 } /* do two to make count 0 mod 4 */ - sfi_breg r2, \ - ldm \B!, { r6, r7 } + ldm r1!, { r4, r5 } /* do two to make count 0 mod 4 */ + ldm r2!, { r6, r7 } OPC r4, r4, r6 OPC r5, r5, r7 teq r1, lr /* end of count? */ - sfi_breg r0, \ - stm \B!, { r4, r5 } + stm r0!, { r4, r5 } beq 9f 2: - sfi_breg r1, \ - ldm \B!, { r3, r5, r7, r10 } /* do four each loop */ - sfi_breg r2, \ - ldm \B!, { r4, r6, r8, ip } + ldm r1!, { r3, r5, r7, r10 } /* do four each loop */ + ldm r2!, { r4, r6, r8, ip } OPC r3, r3, r4 OPC r5, r5, r6 OPC r7, r7, r8 OPC r10, r10, ip teq r1, lr - sfi_breg r0, \ - stm \B!, { r3, r5, r7, r10 } + stm r0!, { r3, r5, r7, r10 } bne 2b 9: |