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authorH.J. Lu <hjl.tools@gmail.com>2021-11-02 18:33:07 -0700
committerSunil K Pandey <skpgkp2@gmail.com>2022-09-28 13:47:29 -0700
commit8844d9b22dfa00675ef4f4e14ffe107a173bc068 (patch)
tree04d12f6aa68ff843ce2ba292aba89a45c8331d64
parent0ec276739a22c0305263941b5213e8c368269ec0 (diff)
downloadglibc-8844d9b22dfa00675ef4f4e14ffe107a173bc068.tar.gz
Add LLL_MUTEX_READ_LOCK [BZ #28537]
CAS instruction is expensive. From the x86 CPU's point of view, getting a cache line for writing is more expensive than reading. See Appendix A.2 Spinlock in: https://www.intel.com/content/dam/www/public/us/en/documents/white-papers/xeon-lock-scaling-analysis-paper.pdf The full compare and swap will grab the cache line exclusive and cause excessive cache line bouncing. Add LLL_MUTEX_READ_LOCK to do an atomic load and skip CAS in spinlock loop if compare may fail to reduce cache line bouncing on contended locks. Reviewed-by: Szabolcs Nagy <szabolcs.nagy@arm.com> (cherry picked from commit d672a98a1af106bd68deb15576710cd61363f7a6)
-rw-r--r--nptl/pthread_mutex_lock.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/nptl/pthread_mutex_lock.c b/nptl/pthread_mutex_lock.c
index 0fd7467b97..ac8a472c08 100644
--- a/nptl/pthread_mutex_lock.c
+++ b/nptl/pthread_mutex_lock.c
@@ -56,6 +56,11 @@
#define FORCE_ELISION(m, s)
#endif
+#ifndef LLL_MUTEX_READ_LOCK
+# define LLL_MUTEX_READ_LOCK(mutex) \
+ atomic_load_relaxed (&(mutex)->__data.__lock)
+#endif
+
static int __pthread_mutex_lock_full (pthread_mutex_t *mutex)
__attribute_noinline__;
@@ -133,6 +138,8 @@ __pthread_mutex_lock (pthread_mutex_t *mutex)
break;
}
atomic_spin_nop ();
+ if (LLL_MUTEX_READ_LOCK (mutex) != 0)
+ continue;
}
while (LLL_MUTEX_TRYLOCK (mutex) != 0);