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| author | H.J. Lu <hjl.tools@gmail.com> | 2017-05-22 12:00:43 -0700 |
|---|---|---|
| committer | H.J. Lu <hjl.tools@gmail.com> | 2017-05-22 13:15:35 -0700 |
| commit | 3e31bc4a930e7b32924befe762014f85d5408692 (patch) | |
| tree | 935e5ab71aa09a1bb00cdf34293fdf9000a3f5e1 | |
| parent | bfb716e07b77f0ed8e0c2689d5cd01e2c8251fc5 (diff) | |
| download | glibc-hjl/x86/optimize.tar.gz | |
Add x86_cache.non_temporal_threshold to GLIBC_TUNABLEShjl/x86/optimize
Add support for "glibc.x86_cache.non_temporal_threshold=number" to
GLIBC_TUNABLES.
* elf/dl-tunables.list (x86_cache): New name space.
* sysdeps/x86/cacheinfo.c [HAVE_TUNABLES] (TUNABLE_NAMESPACE):
New.
[HAVE_TUNABLES]: Include <elf/dl-tunables.h>.
[HAVE_TUNABLES] (DL_TUNABLE_CALLBACK (set_non_temporal_threshold)):
New.
[HAVE_TUNABLES] (init_cacheinfo): Call TUNABLE_SET_VAL_WITH_CALLBACK
with set_non_temporal_threshold.
| -rw-r--r-- | elf/dl-tunables.list | 6 | ||||
| -rw-r--r-- | sysdeps/x86/cacheinfo.c | 22 |
2 files changed, 25 insertions, 3 deletions
diff --git a/elf/dl-tunables.list b/elf/dl-tunables.list index b9f1488798..2c899fe75c 100644 --- a/elf/dl-tunables.list +++ b/elf/dl-tunables.list @@ -77,4 +77,10 @@ glibc { security_level: SXID_IGNORE } } + x86_cache { + non_temporal_threshold { + type: SIZE_T + security_level: SXID_IGNORE + } + } } diff --git a/sysdeps/x86/cacheinfo.c b/sysdeps/x86/cacheinfo.c index 3434d9707c..1b195ebc1b 100644 --- a/sysdeps/x86/cacheinfo.c +++ b/sysdeps/x86/cacheinfo.c @@ -23,6 +23,20 @@ #include <cpuid.h> #include <init-arch.h> +/* Threshold to use non temporal store. */ +long int __x86_shared_non_temporal_threshold attribute_hidden; + +#if HAVE_TUNABLES +# define TUNABLE_NAMESPACE x86_cache +# include <elf/dl-tunables.h> + +void +DL_TUNABLE_CALLBACK (set_non_temporal_threshold) (tunable_val_t *valp) +{ + __x86_shared_non_temporal_threshold = (long int) valp->numval; +} +#endif + #define is_intel GLRO(dl_x86_cpu_features).kind == arch_kind_intel #define is_amd GLRO(dl_x86_cpu_features).kind == arch_kind_amd #define max_cpuid GLRO(dl_x86_cpu_features).max_cpuid @@ -466,9 +480,6 @@ long int __x86_raw_shared_cache_size_half attribute_hidden = 1024 * 1024 / 2; /* Similar to __x86_shared_cache_size, but not rounded. */ long int __x86_raw_shared_cache_size attribute_hidden = 1024 * 1024; -/* Threshold to use non temporal store. */ -long int __x86_shared_non_temporal_threshold attribute_hidden; - #ifndef DISABLE_PREFETCHW /* PREFETCHW support flag for use in memory and string routines. */ int __x86_prefetchw attribute_hidden; @@ -770,4 +781,9 @@ intel_bug_no_cache_info: total shared cache size. */ __x86_shared_non_temporal_threshold = __x86_shared_cache_size * threads * 3 / 4; + +#if HAVE_TUNABLES + TUNABLE_SET_VAL_WITH_CALLBACK (non_temporal_threshold, NULL, + set_non_temporal_threshold); +#endif } |