summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorH.J. Lu <hjl.tools@gmail.com>2017-10-25 08:05:51 -0700
committerH.J. Lu <hjl.tools@gmail.com>2017-10-25 08:05:51 -0700
commita122dbfb2e7f90b338b633a73b576efa258e215d (patch)
treebcad1a651ccf288bfbd0676c8fe82161047df2d4
parent9be7530cc0eae4d39b3d59beadc849a3a6942ffe (diff)
downloadglibc-a122dbfb2e7f90b338b633a73b576efa258e215d.tar.gz
Replace "if if " with "if " in comments
* include/alloc_buffer.h: Replace "if if " with "if " in comments. * sysdeps/mips/memcpy.S: Likkewise. * sysdeps/mips/memset.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_s_sincosf16_core_avx512.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_s_sincosf4_core_sse4.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_s_sincosf8_core_avx2.S: Likewise.
-rw-r--r--ChangeLog13
-rw-r--r--include/alloc_buffer.h4
-rw-r--r--sysdeps/mips/memcpy.S4
-rw-r--r--sysdeps/mips/memset.S2
-rw-r--r--sysdeps/x86_64/fpu/multiarch/svml_s_sincosf16_core_avx512.S2
-rw-r--r--sysdeps/x86_64/fpu/multiarch/svml_s_sincosf4_core_sse4.S2
-rw-r--r--sysdeps/x86_64/fpu/multiarch/svml_s_sincosf8_core_avx2.S2
7 files changed, 21 insertions, 8 deletions
diff --git a/ChangeLog b/ChangeLog
index 69db32290b..bb29b732d5 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,16 @@
+2017-10-25 H.J. Lu <hongjiu.lu@intel.com>
+
+ * include/alloc_buffer.h: Replace "if if " with "if " in
+ comments.
+ * sysdeps/mips/memcpy.S: Likkewise.
+ * sysdeps/mips/memset.S: Likewise.
+ * sysdeps/x86_64/fpu/multiarch/svml_s_sincosf16_core_avx512.S:
+ Likewise.
+ * sysdeps/x86_64/fpu/multiarch/svml_s_sincosf4_core_sse4.S:
+ Likewise.
+ * sysdeps/x86_64/fpu/multiarch/svml_s_sincosf8_core_avx2.S:
+ Likewise.
+
2017-10-25 Mike FABIAN <mfabian@redhat.com>
[BZ #15261]
diff --git a/include/alloc_buffer.h b/include/alloc_buffer.h
index d668a60d66..21558a6c3b 100644
--- a/include/alloc_buffer.h
+++ b/include/alloc_buffer.h
@@ -267,7 +267,7 @@ __alloc_buffer_alloc (struct alloc_buffer *buf, size_t size, size_t align)
/* Obtain a TYPE * pointer to an object in BUF of TYPE. Consume these
bytes from the buffer. Return NULL and mark the buffer as failed
- if if there is not enough room in the buffer, or if the buffer has
+ if there is not enough room in the buffer, or if the buffer has
failed before. */
#define alloc_buffer_alloc(buf, type) \
((type *) __alloc_buffer_alloc \
@@ -315,7 +315,7 @@ void * __libc_alloc_buffer_alloc_array (struct alloc_buffer *buf,
/* Obtain a TYPE * pointer to an array of COUNT objects in BUF of
TYPE. Consume these bytes from the buffer. Return NULL and mark
- the buffer as failed if if there is not enough room in the buffer,
+ the buffer as failed if there is not enough room in the buffer,
or if the buffer has failed before. (Zero-length allocations from
an empty buffer which has not yet failed succeed.) */
#define alloc_buffer_alloc_array(buf, type, count) \
diff --git a/sysdeps/mips/memcpy.S b/sysdeps/mips/memcpy.S
index af01d0dd73..2b84c75807 100644
--- a/sysdeps/mips/memcpy.S
+++ b/sysdeps/mips/memcpy.S
@@ -507,7 +507,7 @@ L(skip_pref):
move a2,t8
/* Here we have src and dest word-aligned but less than 64-bytes or
- * 128 bytes to go. Check for a 32(64) byte chunk and copy if if there
+ * 128 bytes to go. Check for a 32(64) byte chunk and copy if there
* is one. Otherwise jump down to L(chk1w) to handle the tail end of
* the copy.
*/
@@ -736,7 +736,7 @@ L(ua_skip_pref):
move a2,t8
/* Here we have src and dest word-aligned but less than 64-bytes or
- * 128 bytes to go. Check for a 32(64) byte chunk and copy if if there
+ * 128 bytes to go. Check for a 32(64) byte chunk and copy if there
* is one. Otherwise jump down to L(ua_chk1w) to handle the tail end of
* the copy. */
diff --git a/sysdeps/mips/memset.S b/sysdeps/mips/memset.S
index 04370a8660..f6bd624e6f 100644
--- a/sysdeps/mips/memset.S
+++ b/sysdeps/mips/memset.S
@@ -370,7 +370,7 @@ L(skip_pref):
move a2,t8
/* Here we have dest word-aligned but less than 64-bytes or 128 bytes to go.
- Check for a 32(64) byte chunk and copy if if there is one. Otherwise
+ Check for a 32(64) byte chunk and copy if there is one. Otherwise
jump down to L(chk1w) to handle the tail end of the copy. */
L(chkw):
andi t8,a2,NSIZEMASK /* is there a 32-byte/64-byte chunk. */
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_sincosf16_core_avx512.S b/sysdeps/x86_64/fpu/multiarch/svml_s_sincosf16_core_avx512.S
index 8fa4255d6d..64c91e6e2c 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_s_sincosf16_core_avx512.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_sincosf16_core_avx512.S
@@ -41,7 +41,7 @@
b) Calculate 2 polynomials for sin and cos:
RS = X * ( A0 + X^2 * (A1 + x^2 * (A2 + x^2 * (A3))));
RC = B0 + X^2 * (B1 + x^2 * (B2 + x^2 * (B3 + x^2 * (B4))));
- c) Swap RS & RC if if first bit of obtained value after
+ c) Swap RS & RC if first bit of obtained value after
Right Shifting is set to 1. Using And, Andnot & Or operations.
3) Destination sign setting
a) Set shifted destination sign using XOR operation:
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_sincosf4_core_sse4.S b/sysdeps/x86_64/fpu/multiarch/svml_s_sincosf4_core_sse4.S
index 74a6ac1157..748646e8d9 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_s_sincosf4_core_sse4.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_sincosf4_core_sse4.S
@@ -42,7 +42,7 @@ ENTRY (_ZGVbN4vl4l4_sincosf_sse4)
b) Calculate 2 polynomials for sin and cos:
RS = X * ( A0 + X^2 * (A1 + x^2 * (A2 + x^2 * (A3))));
RC = B0 + X^2 * (B1 + x^2 * (B2 + x^2 * (B3 + x^2 * (B4))));
- c) Swap RS & RC if if first bit of obtained value after
+ c) Swap RS & RC if first bit of obtained value after
Right Shifting is set to 1. Using And, Andnot & Or operations.
3) Destination sign setting
a) Set shifted destination sign using XOR operation:
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_sincosf8_core_avx2.S b/sysdeps/x86_64/fpu/multiarch/svml_s_sincosf8_core_avx2.S
index 9e4e2c71c5..aadf45dcb3 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_s_sincosf8_core_avx2.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_sincosf8_core_avx2.S
@@ -42,7 +42,7 @@ ENTRY (_ZGVdN8vl4l4_sincosf_avx2)
b) Calculate 2 polynomials for sin and cos:
RS = X * ( A0 + X^2 * (A1 + x^2 * (A2 + x^2 * (A3))));
RC = B0 + X^2 * (B1 + x^2 * (B2 + x^2 * (B3 + x^2 * (B4))));
- c) Swap RS & RC if if first bit of obtained value after
+ c) Swap RS & RC if first bit of obtained value after
Right Shifting is set to 1. Using And, Andnot & Or operations.
3) Destination sign setting
a) Set shifted destination sign using XOR operation: