x86-64: Implement libmathvec IFUNC selectors in C

	* sysdeps/x86_64/fpu/multiarch/Makefile (libmvec-sysdep_routines)
	Add svml_d_cos2_core-sse2, svml_d_cos4_core-sse,
	svml_d_cos8_core-avx2, svml_d_exp2_core-sse2,
	svml_d_exp4_core-sse, svml_d_exp8_core-avx2,
	svml_d_log2_core-sse2, svml_d_log4_core-sse,
	svml_d_log8_core-avx2, svml_d_pow2_core-sse2,
	svml_d_pow4_core-sse, svml_d_pow8_core-avx2
	svml_d_sin2_core-sse2, svml_d_sin4_core-sse,
	svml_d_sin8_core-avx2, svml_d_sincos2_core-sse2,
	svml_d_sincos4_core-sse, svml_d_sincos8_core-avx2,
	svml_s_cosf16_core-avx2, svml_s_cosf4_core-sse2,
	svml_s_cosf8_core-sse, svml_s_expf16_core-avx2,
	svml_s_expf4_core-sse2, svml_s_expf8_core-sse,
	svml_s_logf16_core-avx2, svml_s_logf4_core-sse2,
	svml_s_logf8_core-sse, svml_s_powf16_core-avx2,
	svml_s_powf4_core-sse2, svml_s_powf8_core-sse,
	svml_s_sincosf16_core-avx2, svml_s_sincosf4_core-sse2,
	svml_s_sincosf8_core-sse, svml_s_sinf16_core-avx2,
	svml_s_sinf4_core-sse2 and svml_s_sinf8_core-sse.
	* sysdeps/x86_64/fpu/multiarch/ifunc-mathvec-avx2.h: New file.
	* sysdeps/x86_64/fpu/multiarch/ifunc-mathvec-avx512.h: Likewise.
	* sysdeps/x86_64/fpu/multiarch/ifunc-mathvec-sse4_1.h: Likewise.
	* sysdeps/x86_64/fpu/multiarch/svml_d_cos2_core.c: Likewise.
	* sysdeps/x86_64/fpu/multiarch/svml_d_cos4_core.c: Likewise.
	* sysdeps/x86_64/fpu/multiarch/svml_d_cos8_core.c: Likewise.
	* sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.c: Likewise.
	* sysdeps/x86_64/fpu/multiarch/svml_d_exp4_core.c: Likewise.
	* sysdeps/x86_64/fpu/multiarch/svml_d_exp8_core.c: Likewise.
	* sysdeps/x86_64/fpu/multiarch/svml_d_log2_core.c: Likewise.
	* sysdeps/x86_64/fpu/multiarch/svml_d_log4_core.c: Likewise.
	* sysdeps/x86_64/fpu/multiarch/svml_d_log8_core.c: Likewise.
	* sysdeps/x86_64/fpu/multiarch/svml_d_pow2_core.c: Likewise.
	* sysdeps/x86_64/fpu/multiarch/svml_d_pow4_core.c: Likewise.
	* sysdeps/x86_64/fpu/multiarch/svml_d_pow8_core.c: Likewise.
	* sysdeps/x86_64/fpu/multiarch/svml_d_sin2_core.c: Likewise.
	* sysdeps/x86_64/fpu/multiarch/svml_d_sin4_core.c: Likewise.
	* sysdeps/x86_64/fpu/multiarch/svml_d_sin8_core.c: Likewise.
	* sysdeps/x86_64/fpu/multiarch/svml_d_sincos2_core.c: Likewise.
	* sysdeps/x86_64/fpu/multiarch/svml_d_sincos4_core.c: Likewise.
	* sysdeps/x86_64/fpu/multiarch/svml_d_sincos8_core.c: Likewise.
	* sysdeps/x86_64/fpu/multiarch/svml_d_cosf16_core.c: Likewise.
	* sysdeps/x86_64/fpu/multiarch/svml_d_cosf4_core.c: Likewise.
	* sysdeps/x86_64/fpu/multiarch/svml_d_cosf8_core.c: Likewise.
	* sysdeps/x86_64/fpu/multiarch/svml_d_expf16_core.c: Likewise.
	* sysdeps/x86_64/fpu/multiarch/svml_d_expf4_core.c: Likewise.
	* sysdeps/x86_64/fpu/multiarch/svml_d_expf8_core.c: Likewise.
	* sysdeps/x86_64/fpu/multiarch/svml_d_logf16_core.c: Likewise.
	* sysdeps/x86_64/fpu/multiarch/svml_d_logf4_core.c: Likewise.
	* sysdeps/x86_64/fpu/multiarch/svml_d_logf8_core.c: Likewise.
	* sysdeps/x86_64/fpu/multiarch/svml_d_powf16_core.c: Likewise.
	* sysdeps/x86_64/fpu/multiarch/svml_d_powf4_core.c: Likewise.
	* sysdeps/x86_64/fpu/multiarch/svml_d_powf8_core.c: Likewise.
	* sysdeps/x86_64/fpu/multiarch/svml_d_sincosf16_core.c: Likewise.
	* sysdeps/x86_64/fpu/multiarch/svml_d_sincosf4_core.c: Likewise.
	* sysdeps/x86_64/fpu/multiarch/svml_d_sincosf8_core.c: Likewise.
	* sysdeps/x86_64/fpu/multiarch/svml_d_sinf16_core.c: Likewise.
	* sysdeps/x86_64/fpu/multiarch/svml_d_sinf4_core.c: Likewise.
	* sysdeps/x86_64/fpu/multiarch/svml_d_sinf8_core.c: Likewise.
	* sysdeps/x86_64/fpu/multiarch/svml_d_cos2_core.S:  Renamed to
	...
	* sysdeps/x86_64/fpu/multiarch/svml_d_cos2_core-sse2.S: This.
	Don't include <sysdep.h> nor <init-arch.h>.
	(_ZGVbN2v_cos): Removed.
	* sysdeps/x86_64/fpu/multiarch/svml_d_cos4_core.S:  Renamed to
	...
	* sysdeps/x86_64/fpu/multiarch/svml_d_cos4_core-sse.S: This.
	Don't include <sysdep.h> nor <init-arch.h>.
	(_ZGVdN4v_cos): Removed.
	* sysdeps/x86_64/fpu/multiarch/svml_d_cos8_core.S:  Renamed to
	...
	* sysdeps/x86_64/fpu/multiarch/svml_d_cos8_core-avx2.S: This.
	Don't include <sysdep.h> nor <init-arch.h>.
	(_ZGVeN8v_cos): Removed.
	* sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S:  Renamed to
	...
	* sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core-sse2.S: This.
	Don't include <sysdep.h> nor <init-arch.h>.
	(_ZGVbN2v_exp): Removed.
	* sysdeps/x86_64/fpu/multiarch/svml_d_exp4_core.S:  Renamed to
	...
	* sysdeps/x86_64/fpu/multiarch/svml_d_exp4_core-sse.S: This.
	Don't include <sysdep.h> nor <init-arch.h>.
	(_ZGVdN4v_exp): Removed.
	* sysdeps/x86_64/fpu/multiarch/svml_d_exp8_core.S:  Renamed to
	...
	* sysdeps/x86_64/fpu/multiarch/svml_d_exp8_core-avx2.S: This.
	Don't include <sysdep.h> nor <init-arch.h>.
	(_ZGVeN8v_exp): Removed.
	* sysdeps/x86_64/fpu/multiarch/svml_d_log2_core.S:  Renamed to
	...
	* sysdeps/x86_64/fpu/multiarch/svml_d_log2_core-sse2.S: This.
	Don't include <sysdep.h> nor <init-arch.h>.
	(_ZGVbN2v_log): Removed.
	* sysdeps/x86_64/fpu/multiarch/svml_d_log4_core.S:  Renamed to
	...
	* sysdeps/x86_64/fpu/multiarch/svml_d_log4_core-sse.S: This.
	Don't include <sysdep.h> nor <init-arch.h>.
	(_ZGVdN4v_log): Removed.
	* sysdeps/x86_64/fpu/multiarch/svml_d_log8_core.S:  Renamed to
	...
	* sysdeps/x86_64/fpu/multiarch/svml_d_log8_core-avx2.S: This.
	Don't include <sysdep.h> nor <init-arch.h>.
	(_ZGVeN8v_log): Removed.
	* sysdeps/x86_64/fpu/multiarch/svml_d_pow2_core.S:  Renamed to
	...
	* sysdeps/x86_64/fpu/multiarch/svml_d_pow2_core-sse2.S: This.
	Don't include <sysdep.h> nor <init-arch.h>.
	(_ZGVbN2vv_pow): Removed.
	* sysdeps/x86_64/fpu/multiarch/svml_d_pow4_core.S:  Renamed to
	...
	* sysdeps/x86_64/fpu/multiarch/svml_d_pow4_core-sse.S: This.
	Don't include <sysdep.h> nor <init-arch.h>.
	(_ZGVdN4vv_pow): Removed.
	* sysdeps/x86_64/fpu/multiarch/svml_d_pow8_core.S:  Renamed to
	...
	* sysdeps/x86_64/fpu/multiarch/svml_d_pow8_core-avx2.S: This.
	Don't include <sysdep.h> nor <init-arch.h>.
	(_ZGVeN8vv_pow): Removed.
	* sysdeps/x86_64/fpu/multiarch/svml_d_sin2_core.S:  Renamed to
	...
	* sysdeps/x86_64/fpu/multiarch/svml_d_sin2_core-sse2.S: This.
	Don't include <sysdep.h> nor <init-arch.h>.
	(_ZGVbN2v_sin): Removed.
	* sysdeps/x86_64/fpu/multiarch/svml_d_sin4_core.S:  Renamed to
	...
	* sysdeps/x86_64/fpu/multiarch/svml_d_sin4_core-sse.S: This.
	Don't include <sysdep.h> nor <init-arch.h>.
	(_ZGVbN4v_sin): Removed.
	* sysdeps/x86_64/fpu/multiarch/svml_d_sin8_core.S:  Renamed to
	...
	* sysdeps/x86_64/fpu/multiarch/svml_d_sin8_core-avx2.S: This.
	Don't include <sysdep.h> nor <init-arch.h>.
	(_ZGVbN8v_sin): Removed.
	* sysdeps/x86_64/fpu/multiarch/svml_d_sincos2_core.S:  Renamed to
	...
	* sysdeps/x86_64/fpu/multiarch/svml_d_sincos2_core-sse2.S: This.
	Don't include <sysdep.h> nor <init-arch.h>.
	(_ZGVbN2vvv_sincos): Removed.
	* sysdeps/x86_64/fpu/multiarch/svml_d_sincos4_core.S:  Renamed to
	...
	* sysdeps/x86_64/fpu/multiarch/svml_d_sincos4_core-sse.S: This.
	Don't include <sysdep.h> nor <init-arch.h>.
	(_ZGVdN4vvv_sincos): Removed.
	* sysdeps/x86_64/fpu/multiarch/svml_d_sincos8_core.S:  Renamed to
	...
	* sysdeps/x86_64/fpu/multiarch/svml_d_sincos8_core-avx2.S: This.
	Don't include <sysdep.h> nor <init-arch.h>.
	(_ZGVeN8vvv_sincos): Removed.
	* sysdeps/x86_64/fpu/multiarch/svml_d_cosf16_core.S:  Renamed to
	...
	* sysdeps/x86_64/fpu/multiarch/svml_d_cosf16_core-avx2.S: This.
	Don't include <sysdep.h> nor <init-arch.h>.
	(_ZGVeN16v_cosf): Removed.
	* sysdeps/x86_64/fpu/multiarch/svml_d_cosf4_core.S:  Renamed to
	...
	* sysdeps/x86_64/fpu/multiarch/svml_d_cosf4_core-sse2.S: This.
	Don't include <sysdep.h> nor <init-arch.h>.
	(_ZGVbN4v_cosf): Removed.
	* sysdeps/x86_64/fpu/multiarch/svml_d_cosf8_core.S:  Renamed to
	...
	* sysdeps/x86_64/fpu/multiarch/svml_d_cosf8_core-sse.S: This.
	Don't include <sysdep.h> nor <init-arch.h>.
	(_ZGVdN8v_cosf): Removed.
	* sysdeps/x86_64/fpu/multiarch/svml_d_expf16_core.S:  Renamed to
	...
	* sysdeps/x86_64/fpu/multiarch/svml_d_expf16_core-avx2.S: This.
	Don't include <sysdep.h> nor <init-arch.h>.
	(_ZGVeN16v_expf): Removed.
	* sysdeps/x86_64/fpu/multiarch/svml_d_expf4_core.S:  Renamed to
	...
	* sysdeps/x86_64/fpu/multiarch/svml_d_expf4_core-sse2.S: This.
	Don't include <sysdep.h> nor <init-arch.h>.
	(_ZGVbN4v_expf): Removed.
	* sysdeps/x86_64/fpu/multiarch/svml_d_expf8_core.S:  Renamed to
	...
	* sysdeps/x86_64/fpu/multiarch/svml_d_expf8_core-sse.S: This.
	Don't include <sysdep.h> nor <init-arch.h>.
	(_ZGVdN8v_expf): Removed.
	* sysdeps/x86_64/fpu/multiarch/svml_d_logf16_core.S:  Renamed to
	...
	* sysdeps/x86_64/fpu/multiarch/svml_d_logf16_core-avx2.S: This.
	Don't include <sysdep.h> nor <init-arch.h>.
	(_ZGVeN16v_logf): Removed.
	* sysdeps/x86_64/fpu/multiarch/svml_d_logf4_core.S:  Renamed to
	...
	* sysdeps/x86_64/fpu/multiarch/svml_d_logf4_core-sse2.S: This.
	Don't include <sysdep.h> nor <init-arch.h>.
	(_ZGVbN4v_logf): Removed.
	* sysdeps/x86_64/fpu/multiarch/svml_d_logf8_core.S:  Renamed to
	...
	* sysdeps/x86_64/fpu/multiarch/svml_d_logf8_core-sse.S: This.
	Don't include <sysdep.h> nor <init-arch.h>.
	(_ZGVdN8v_logf): Removed.
	* sysdeps/x86_64/fpu/multiarch/svml_d_powf16_core.S:  Renamed to
	...
	* sysdeps/x86_64/fpu/multiarch/svml_d_powf16_core-avx2.S: This.
	Don't include <sysdep.h> nor <init-arch.h>.
	(_ZGVeN16vv_powf): Removed.
	* sysdeps/x86_64/fpu/multiarch/svml_d_powf4_core.S:  Renamed to
	...
	* sysdeps/x86_64/fpu/multiarch/svml_d_powf4_core-sse2.S: This.
	Don't include <sysdep.h> nor <init-arch.h>.
	(_ZGVbN4vv_powf): Removed.
	* sysdeps/x86_64/fpu/multiarch/svml_d_powf8_core.S:  Renamed to
	...
	* sysdeps/x86_64/fpu/multiarch/svml_d_powf8_core-sse.S: This.
	Don't include <sysdep.h> nor <init-arch.h>.
	(_ZGVdN8vv_powf): Removed.
	* sysdeps/x86_64/fpu/multiarch/svml_d_sincosf16_core.S:  Renamed to
	...
	* sysdeps/x86_64/fpu/multiarch/svml_d_sincosf16_core-avx2.S: This.
	Don't include <sysdep.h> nor <init-arch.h>.
	(_ZGVeN16vvv_sincosf): Removed.
	* sysdeps/x86_64/fpu/multiarch/svml_d_sincosf4_core.S:  Renamed to
	...
	* sysdeps/x86_64/fpu/multiarch/svml_d_sincosf4_core-sse2.S: This.
	Don't include <sysdep.h> nor <init-arch.h>.
	(_ZGVbN4vvv_sincosf): Removed.
	* sysdeps/x86_64/fpu/multiarch/svml_d_sincosf8_core.S:  Renamed to
	...
	* sysdeps/x86_64/fpu/multiarch/svml_d_sincosf8_core-sse.S: This.
	Don't include <sysdep.h> nor <init-arch.h>.
	(_ZGVdN8vvv_sincosf): Removed.
	* sysdeps/x86_64/fpu/multiarch/svml_d_sinf16_core.S:  Renamed to
	...
	* sysdeps/x86_64/fpu/multiarch/svml_d_sinf16_core-avx2.S: This.
	Don't include <sysdep.h> nor <init-arch.h>.
	(_ZGVeN16v_sinf): Removed.
	* sysdeps/x86_64/fpu/multiarch/svml_d_sinf4_core.S:  Renamed to
	...
	* sysdeps/x86_64/fpu/multiarch/svml_d_sinf4_core-sse2.S: This.
	Don't include <sysdep.h> nor <init-arch.h>.
	(_ZGVbN4v_sinf): Removed.
	* sysdeps/x86_64/fpu/multiarch/svml_d_sinf8_core.S:  Renamed to
	...
	* sysdeps/x86_64/fpu/multiarch/svml_d_sinf8_core-sse.S: This.
	Don't include <sysdep.h> nor <init-arch.h>.
	(_ZGVdN8v_sinf): Removed.

77 files changed, 1422 insertions, 619 deletions

diff --git a/ChangeLog b/ChangeLog
index 421a0e0594..268436266c 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,5 +1,246 @@
 2017-08-04  H.J. Lu  <hongjiu.lu@intel.com>
 
+	* sysdeps/x86_64/fpu/multiarch/Makefile (libmvec-sysdep_routines)
+	Add svml_d_cos2_core-sse2, svml_d_cos4_core-sse,
+	svml_d_cos8_core-avx2, svml_d_exp2_core-sse2,
+	svml_d_exp4_core-sse, svml_d_exp8_core-avx2,
+	svml_d_log2_core-sse2, svml_d_log4_core-sse,
+	svml_d_log8_core-avx2, svml_d_pow2_core-sse2,
+	svml_d_pow4_core-sse, svml_d_pow8_core-avx2
+	svml_d_sin2_core-sse2, svml_d_sin4_core-sse,
+	svml_d_sin8_core-avx2, svml_d_sincos2_core-sse2,
+	svml_d_sincos4_core-sse, svml_d_sincos8_core-avx2,
+	svml_s_cosf16_core-avx2, svml_s_cosf4_core-sse2,
+	svml_s_cosf8_core-sse, svml_s_expf16_core-avx2,
+	svml_s_expf4_core-sse2, svml_s_expf8_core-sse,
+	svml_s_logf16_core-avx2, svml_s_logf4_core-sse2,
+	svml_s_logf8_core-sse, svml_s_powf16_core-avx2,
+	svml_s_powf4_core-sse2, svml_s_powf8_core-sse,
+	svml_s_sincosf16_core-avx2, svml_s_sincosf4_core-sse2,
+	svml_s_sincosf8_core-sse, svml_s_sinf16_core-avx2,
+	svml_s_sinf4_core-sse2 and svml_s_sinf8_core-sse.
+	* sysdeps/x86_64/fpu/multiarch/ifunc-mathvec-avx2.h: New file.
+	* sysdeps/x86_64/fpu/multiarch/ifunc-mathvec-avx512.h: Likewise.
+	* sysdeps/x86_64/fpu/multiarch/ifunc-mathvec-sse4_1.h: Likewise.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_cos2_core.c: Likewise.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_cos4_core.c: Likewise.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_cos8_core.c: Likewise.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.c: Likewise.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_exp4_core.c: Likewise.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_exp8_core.c: Likewise.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_log2_core.c: Likewise.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_log4_core.c: Likewise.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_log8_core.c: Likewise.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_pow2_core.c: Likewise.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_pow4_core.c: Likewise.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_pow8_core.c: Likewise.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_sin2_core.c: Likewise.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_sin4_core.c: Likewise.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_sin8_core.c: Likewise.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_sincos2_core.c: Likewise.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_sincos4_core.c: Likewise.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_sincos8_core.c: Likewise.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_cosf16_core.c: Likewise.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_cosf4_core.c: Likewise.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_cosf8_core.c: Likewise.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_expf16_core.c: Likewise.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_expf4_core.c: Likewise.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_expf8_core.c: Likewise.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_logf16_core.c: Likewise.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_logf4_core.c: Likewise.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_logf8_core.c: Likewise.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_powf16_core.c: Likewise.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_powf4_core.c: Likewise.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_powf8_core.c: Likewise.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_sincosf16_core.c: Likewise.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_sincosf4_core.c: Likewise.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_sincosf8_core.c: Likewise.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_sinf16_core.c: Likewise.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_sinf4_core.c: Likewise.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_sinf8_core.c: Likewise.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_cos2_core.S:  Renamed to
+	...
+	* sysdeps/x86_64/fpu/multiarch/svml_d_cos2_core-sse2.S: This.
+	Don't include <sysdep.h> nor <init-arch.h>.
+	(_ZGVbN2v_cos): Removed.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_cos4_core.S:  Renamed to
+	...
+	* sysdeps/x86_64/fpu/multiarch/svml_d_cos4_core-sse.S: This.
+	Don't include <sysdep.h> nor <init-arch.h>.
+	(_ZGVdN4v_cos): Removed.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_cos8_core.S:  Renamed to
+	...
+	* sysdeps/x86_64/fpu/multiarch/svml_d_cos8_core-avx2.S: This.
+	Don't include <sysdep.h> nor <init-arch.h>.
+	(_ZGVeN8v_cos): Removed.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S:  Renamed to
+	...
+	* sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core-sse2.S: This.
+	Don't include <sysdep.h> nor <init-arch.h>.
+	(_ZGVbN2v_exp): Removed.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_exp4_core.S:  Renamed to
+	...
+	* sysdeps/x86_64/fpu/multiarch/svml_d_exp4_core-sse.S: This.
+	Don't include <sysdep.h> nor <init-arch.h>.
+	(_ZGVdN4v_exp): Removed.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_exp8_core.S:  Renamed to
+	...
+	* sysdeps/x86_64/fpu/multiarch/svml_d_exp8_core-avx2.S: This.
+	Don't include <sysdep.h> nor <init-arch.h>.
+	(_ZGVeN8v_exp): Removed.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_log2_core.S:  Renamed to
+	...
+	* sysdeps/x86_64/fpu/multiarch/svml_d_log2_core-sse2.S: This.
+	Don't include <sysdep.h> nor <init-arch.h>.
+	(_ZGVbN2v_log): Removed.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_log4_core.S:  Renamed to
+	...
+	* sysdeps/x86_64/fpu/multiarch/svml_d_log4_core-sse.S: This.
+	Don't include <sysdep.h> nor <init-arch.h>.
+	(_ZGVdN4v_log): Removed.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_log8_core.S:  Renamed to
+	...
+	* sysdeps/x86_64/fpu/multiarch/svml_d_log8_core-avx2.S: This.
+	Don't include <sysdep.h> nor <init-arch.h>.
+	(_ZGVeN8v_log): Removed.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_pow2_core.S:  Renamed to
+	...
+	* sysdeps/x86_64/fpu/multiarch/svml_d_pow2_core-sse2.S: This.
+	Don't include <sysdep.h> nor <init-arch.h>.
+	(_ZGVbN2vv_pow): Removed.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_pow4_core.S:  Renamed to
+	...
+	* sysdeps/x86_64/fpu/multiarch/svml_d_pow4_core-sse.S: This.
+	Don't include <sysdep.h> nor <init-arch.h>.
+	(_ZGVdN4vv_pow): Removed.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_pow8_core.S:  Renamed to
+	...
+	* sysdeps/x86_64/fpu/multiarch/svml_d_pow8_core-avx2.S: This.
+	Don't include <sysdep.h> nor <init-arch.h>.
+	(_ZGVeN8vv_pow): Removed.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_sin2_core.S:  Renamed to
+	...
+	* sysdeps/x86_64/fpu/multiarch/svml_d_sin2_core-sse2.S: This.
+	Don't include <sysdep.h> nor <init-arch.h>.
+	(_ZGVbN2v_sin): Removed.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_sin4_core.S:  Renamed to
+	...
+	* sysdeps/x86_64/fpu/multiarch/svml_d_sin4_core-sse.S: This.
+	Don't include <sysdep.h> nor <init-arch.h>.
+	(_ZGVbN4v_sin): Removed.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_sin8_core.S:  Renamed to
+	...
+	* sysdeps/x86_64/fpu/multiarch/svml_d_sin8_core-avx2.S: This.
+	Don't include <sysdep.h> nor <init-arch.h>.
+	(_ZGVbN8v_sin): Removed.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_sincos2_core.S:  Renamed to
+	...
+	* sysdeps/x86_64/fpu/multiarch/svml_d_sincos2_core-sse2.S: This.
+	Don't include <sysdep.h> nor <init-arch.h>.
+	(_ZGVbN2vvv_sincos): Removed.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_sincos4_core.S:  Renamed to
+	...
+	* sysdeps/x86_64/fpu/multiarch/svml_d_sincos4_core-sse.S: This.
+	Don't include <sysdep.h> nor <init-arch.h>.
+	(_ZGVdN4vvv_sincos): Removed.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_sincos8_core.S:  Renamed to
+	...
+	* sysdeps/x86_64/fpu/multiarch/svml_d_sincos8_core-avx2.S: This.
+	Don't include <sysdep.h> nor <init-arch.h>.
+	(_ZGVeN8vvv_sincos): Removed.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_cosf16_core.S:  Renamed to
+	...
+	* sysdeps/x86_64/fpu/multiarch/svml_d_cosf16_core-avx2.S: This.
+	Don't include <sysdep.h> nor <init-arch.h>.
+	(_ZGVeN16v_cosf): Removed.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_cosf4_core.S:  Renamed to
+	...
+	* sysdeps/x86_64/fpu/multiarch/svml_d_cosf4_core-sse2.S: This.
+	Don't include <sysdep.h> nor <init-arch.h>.
+	(_ZGVbN4v_cosf): Removed.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_cosf8_core.S:  Renamed to
+	...
+	* sysdeps/x86_64/fpu/multiarch/svml_d_cosf8_core-sse.S: This.
+	Don't include <sysdep.h> nor <init-arch.h>.
+	(_ZGVdN8v_cosf): Removed.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_expf16_core.S:  Renamed to
+	...
+	* sysdeps/x86_64/fpu/multiarch/svml_d_expf16_core-avx2.S: This.
+	Don't include <sysdep.h> nor <init-arch.h>.
+	(_ZGVeN16v_expf): Removed.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_expf4_core.S:  Renamed to
+	...
+	* sysdeps/x86_64/fpu/multiarch/svml_d_expf4_core-sse2.S: This.
+	Don't include <sysdep.h> nor <init-arch.h>.
+	(_ZGVbN4v_expf): Removed.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_expf8_core.S:  Renamed to
+	...
+	* sysdeps/x86_64/fpu/multiarch/svml_d_expf8_core-sse.S: This.
+	Don't include <sysdep.h> nor <init-arch.h>.
+	(_ZGVdN8v_expf): Removed.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_logf16_core.S:  Renamed to
+	...
+	* sysdeps/x86_64/fpu/multiarch/svml_d_logf16_core-avx2.S: This.
+	Don't include <sysdep.h> nor <init-arch.h>.
+	(_ZGVeN16v_logf): Removed.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_logf4_core.S:  Renamed to
+	...
+	* sysdeps/x86_64/fpu/multiarch/svml_d_logf4_core-sse2.S: This.
+	Don't include <sysdep.h> nor <init-arch.h>.
+	(_ZGVbN4v_logf): Removed.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_logf8_core.S:  Renamed to
+	...
+	* sysdeps/x86_64/fpu/multiarch/svml_d_logf8_core-sse.S: This.
+	Don't include <sysdep.h> nor <init-arch.h>.
+	(_ZGVdN8v_logf): Removed.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_powf16_core.S:  Renamed to
+	...
+	* sysdeps/x86_64/fpu/multiarch/svml_d_powf16_core-avx2.S: This.
+	Don't include <sysdep.h> nor <init-arch.h>.
+	(_ZGVeN16vv_powf): Removed.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_powf4_core.S:  Renamed to
+	...
+	* sysdeps/x86_64/fpu/multiarch/svml_d_powf4_core-sse2.S: This.
+	Don't include <sysdep.h> nor <init-arch.h>.
+	(_ZGVbN4vv_powf): Removed.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_powf8_core.S:  Renamed to
+	...
+	* sysdeps/x86_64/fpu/multiarch/svml_d_powf8_core-sse.S: This.
+	Don't include <sysdep.h> nor <init-arch.h>.
+	(_ZGVdN8vv_powf): Removed.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_sincosf16_core.S:  Renamed to
+	...
+	* sysdeps/x86_64/fpu/multiarch/svml_d_sincosf16_core-avx2.S: This.
+	Don't include <sysdep.h> nor <init-arch.h>.
+	(_ZGVeN16vvv_sincosf): Removed.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_sincosf4_core.S:  Renamed to
+	...
+	* sysdeps/x86_64/fpu/multiarch/svml_d_sincosf4_core-sse2.S: This.
+	Don't include <sysdep.h> nor <init-arch.h>.
+	(_ZGVbN4vvv_sincosf): Removed.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_sincosf8_core.S:  Renamed to
+	...
+	* sysdeps/x86_64/fpu/multiarch/svml_d_sincosf8_core-sse.S: This.
+	Don't include <sysdep.h> nor <init-arch.h>.
+	(_ZGVdN8vvv_sincosf): Removed.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_sinf16_core.S:  Renamed to
+	...
+	* sysdeps/x86_64/fpu/multiarch/svml_d_sinf16_core-avx2.S: This.
+	Don't include <sysdep.h> nor <init-arch.h>.
+	(_ZGVeN16v_sinf): Removed.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_sinf4_core.S:  Renamed to
+	...
+	* sysdeps/x86_64/fpu/multiarch/svml_d_sinf4_core-sse2.S: This.
+	Don't include <sysdep.h> nor <init-arch.h>.
+	(_ZGVbN4v_sinf): Removed.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_sinf8_core.S:  Renamed to
+	...
+	* sysdeps/x86_64/fpu/multiarch/svml_d_sinf8_core-sse.S: This.
+	Don't include <sysdep.h> nor <init-arch.h>.
+	(_ZGVdN8v_sinf): Removed.
+
+2017-08-04  H.J. Lu  <hongjiu.lu@intel.com>
+
 	* sysdeps/x86_64/fpu/multiarch/Makefile (libm-sysdep_routines):
 	Add s_ceil-sse4_1, s_ceilf-sse4_1, s_floor-sse4_1,
 	s_floorf-sse4_1, s_nearbyint-sse4_1, s_nearbyintf-sse4_1,
diff --git a/sysdeps/x86_64/fpu/multiarch/Makefile b/sysdeps/x86_64/fpu/multiarch/Makefile
index 86ddde358b..f9ceb09a4e 100644
--- a/sysdeps/x86_64/fpu/multiarch/Makefile
+++ b/sysdeps/x86_64/fpu/multiarch/Makefile
@@ -70,5 +70,35 @@ libmvec-sysdep_routines += svml_d_cos2_core_sse4 svml_d_cos4_core_avx2 \
 			   svml_d_pow4_core_avx2 svml_d_pow8_core_avx512 \
 			   svml_s_powf4_core_sse4 svml_s_powf8_core_avx2 \
 			   svml_s_powf16_core_avx512 svml_s_sincosf4_core_sse4 \
-			   svml_s_sincosf8_core_avx2 svml_s_sincosf16_core_avx512
+			   svml_s_sincosf8_core_avx2 \
+			   svml_s_sincosf16_core_avx512 \
+			   svml_d_cos2_core-sse2 svml_d_cos4_core-sse \
+			   svml_d_cos8_core-avx2 svml_d_exp2_core-sse2 \
+			   svml_d_exp4_core-sse svml_d_exp8_core-avx2 \
+			   svml_d_log2_core-sse2 svml_d_log4_core-sse \
+			   svml_d_log8_core-avx2 svml_d_pow2_core-sse2 \
+			   svml_d_pow4_core-sse svml_d_pow8_core-avx2 \
+			   svml_d_sin2_core-sse2 svml_d_sin4_core-sse \
+			   svml_d_sin8_core-avx2 \
+			   svml_d_sincos2_core-sse2 \
+			   svml_d_sincos4_core-sse \
+			   svml_d_sincos8_core-avx2 \
+			   svml_s_cosf16_core-avx2 \
+			   svml_s_cosf4_core-sse2 \
+			   svml_s_cosf8_core-sse \
+			   svml_s_expf16_core-avx2 \
+			   svml_s_expf4_core-sse2 \
+			   svml_s_expf8_core-sse \
+			   svml_s_logf16_core-avx2 \
+			   svml_s_logf4_core-sse2 \
+			   svml_s_logf8_core-sse \
+			   svml_s_powf16_core-avx2 \
+			   svml_s_powf4_core-sse2 \
+			   svml_s_powf8_core-sse \
+			   svml_s_sincosf16_core-avx2 \
+			   svml_s_sincosf4_core-sse2 \
+			   svml_s_sincosf8_core-sse \
+			   svml_s_sinf16_core-avx2 \
+			   svml_s_sinf4_core-sse2 \
+			   svml_s_sinf8_core-sse
 endif
diff --git a/sysdeps/x86_64/fpu/multiarch/ifunc-mathvec-avx2.h b/sysdeps/x86_64/fpu/multiarch/ifunc-mathvec-avx2.h
new file mode 100644
index 0000000000..a43d4c54fa
--- /dev/null
+++ b/sysdeps/x86_64/fpu/multiarch/ifunc-mathvec-avx2.h
@@ -0,0 +1,38 @@
+/* Common definition for libmathvec ifunc selections optimized with
+   AVX2.
+   Copyright (C) 2017 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <init-arch.h>
+
+#undef PASTER2
+#define PASTER2(x,y)	x##_##y
+
+extern void REDIRECT_NAME (void);
+extern __typeof (REDIRECT_NAME) OPTIMIZE (sse_wrapper) attribute_hidden;
+extern __typeof (REDIRECT_NAME) OPTIMIZE (avx2) attribute_hidden;
+
+static inline void *
+IFUNC_SELECTOR (void)
+{
+  const struct cpu_features* cpu_features = __get_cpu_features ();
+
+  if (CPU_FEATURES_ARCH_P (cpu_features, AVX2_Usable))
+    return OPTIMIZE (avx2);
+
+  return OPTIMIZE (sse_wrapper);
+}
diff --git a/sysdeps/x86_64/fpu/multiarch/ifunc-mathvec-avx512.h b/sysdeps/x86_64/fpu/multiarch/ifunc-mathvec-avx512.h
new file mode 100644
index 0000000000..1857e1f760
--- /dev/null
+++ b/sysdeps/x86_64/fpu/multiarch/ifunc-mathvec-avx512.h
@@ -0,0 +1,42 @@
+/* Common definition for libmathvec ifunc selections optimized with
+   AVX512.
+   Copyright (C) 2017 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <init-arch.h>
+
+#undef PASTER2
+#define PASTER2(x,y)	x##_##y
+
+extern void REDIRECT_NAME (void);
+extern __typeof (REDIRECT_NAME) OPTIMIZE (avx2_wrapper) attribute_hidden;
+extern __typeof (REDIRECT_NAME) OPTIMIZE (knl) attribute_hidden;
+extern __typeof (REDIRECT_NAME) OPTIMIZE (skx) attribute_hidden;
+
+static inline void *
+IFUNC_SELECTOR (void)
+{
+  const struct cpu_features* cpu_features = __get_cpu_features ();
+
+  if (CPU_FEATURES_ARCH_P (cpu_features, AVX512DQ_Usable))
+    return OPTIMIZE (skx);
+
+  if (CPU_FEATURES_ARCH_P (cpu_features, AVX512F_Usable))
+    return OPTIMIZE (knl);
+
+  return OPTIMIZE (avx2_wrapper);
+}
diff --git a/sysdeps/x86_64/fpu/multiarch/ifunc-mathvec-sse4_1.h b/sysdeps/x86_64/fpu/multiarch/ifunc-mathvec-sse4_1.h
new file mode 100644
index 0000000000..fcd0e68aba
--- /dev/null
+++ b/sysdeps/x86_64/fpu/multiarch/ifunc-mathvec-sse4_1.h
@@ -0,0 +1,38 @@
+/* Common definition for libmathvec ifunc selections optimized with
+   SSE4.1.
+   Copyright (C) 2017 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <init-arch.h>
+
+#undef PASTER2
+#define PASTER2(x,y)	x##_##y
+
+extern void REDIRECT_NAME (void);
+extern __typeof (REDIRECT_NAME) OPTIMIZE (sse2) attribute_hidden;
+extern __typeof (REDIRECT_NAME) OPTIMIZE (sse4) attribute_hidden;
+
+static inline void *
+IFUNC_SELECTOR (void)
+{
+  const struct cpu_features* cpu_features = __get_cpu_features ();
+
+  if (CPU_FEATURES_CPU_P (cpu_features, SSE4_1))
+    return OPTIMIZE (sse4);
+
+  return OPTIMIZE (sse2);
+}
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_cos2_core.S b/sysdeps/x86_64/fpu/multiarch/svml_d_cos2_core-sse2.S
index b209492442..82601e7ad5 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_d_cos2_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_cos2_core-sse2.S
@@ -1,4 +1,4 @@
-/* Multiple versions of vectorized cos, vector length is 2.
+/* SSE2 version of vectorized cos, vector length is 2.
    Copyright (C) 2014-2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
@@ -16,21 +16,5 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
-#include <init-arch.h>
-
-	.text
-ENTRY (_ZGVbN2v_cos)
-        .type   _ZGVbN2v_cos, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVbN2v_cos_sse4(%rip), %rax
-	HAS_CPU_FEATURE (SSE4_1)
-        jz      2f
-        ret
-2:      leaq    _ZGVbN2v_cos_sse2(%rip), %rax
-        ret
-END (_ZGVbN2v_cos)
-libmvec_hidden_def (_ZGVbN2v_cos)
-
 #define _ZGVbN2v_cos _ZGVbN2v_cos_sse2
 #include "../svml_d_cos2_core.S"
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_cos2_core.c b/sysdeps/x86_64/fpu/multiarch/svml_d_cos2_core.c
new file mode 100644
index 0000000000..f5645c78f2
--- /dev/null
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_cos2_core.c
@@ -0,0 +1,27 @@
+/* Multiple versions of vectorized cos, vector length is 2.
+   Copyright (C) 2017 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#define SYMBOL_NAME _ZGVbN2v_cos
+#include "ifunc-mathvec-sse4_1.h"
+
+libc_ifunc_redirected (REDIRECT_NAME, SYMBOL_NAME, IFUNC_SELECTOR ());
+
+#ifdef SHARED
+__hidden_ver1 (_ZGVbN2v_cos, __GI__ZGVbN2v_cos, __redirect__ZGVbN2v_cos)
+  __attribute__ ((visibility ("hidden")));
+#endif
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_cos4_core.S b/sysdeps/x86_64/fpu/multiarch/svml_d_cos4_core-sse.S
index ff382e9c6c..cd928f2fab 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_d_cos4_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_cos4_core-sse.S
@@ -1,4 +1,4 @@
-/* Multiple versions of vectorized cos, vector length is 4.
+/* SSE version of vectorized cos, vector length is 4.
    Copyright (C) 2014-2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
@@ -16,21 +16,5 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
-#include <init-arch.h>
-
-	.text
-ENTRY (_ZGVdN4v_cos)
-        .type   _ZGVdN4v_cos, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVdN4v_cos_avx2(%rip), %rax
-	HAS_ARCH_FEATURE (AVX2_Usable)
-        jz      2f
-        ret
-2:      leaq    _ZGVdN4v_cos_sse_wrapper(%rip), %rax
-        ret
-END (_ZGVdN4v_cos)
-libmvec_hidden_def (_ZGVdN4v_cos)
-
 #define _ZGVdN4v_cos _ZGVdN4v_cos_sse_wrapper
 #include "../svml_d_cos4_core.S"
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_cos4_core.c b/sysdeps/x86_64/fpu/multiarch/svml_d_cos4_core.c
new file mode 100644
index 0000000000..7b29e2522d
--- /dev/null
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_cos4_core.c
@@ -0,0 +1,27 @@
+/* Multiple versions of vectorized cos, vector length is 4.
+   Copyright (C) 2017 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#define SYMBOL_NAME _ZGVdN4v_cos
+#include "ifunc-mathvec-avx2.h"
+
+libc_ifunc_redirected (REDIRECT_NAME, SYMBOL_NAME, IFUNC_SELECTOR ());
+
+#ifdef SHARED
+__hidden_ver1 (_ZGVdN4v_cos, __GI__ZGVdN4v_cos, __redirect__ZGVdN4v_cos)
+  __attribute__ ((visibility ("hidden")));
+#endif
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_cos8_core.S b/sysdeps/x86_64/fpu/multiarch/svml_d_cos8_core-avx2.S
index 46d35a25d2..b4c8ae2711 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_d_cos8_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_cos8_core-avx2.S
@@ -1,4 +1,4 @@
-/* Multiple versions of vectorized cos, vector length is 8.
+/* AVX2 version of vectorized cos, vector length is 8.
    Copyright (C) 2014-2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
@@ -16,22 +16,5 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
-#include <init-arch.h>
-
-	.text
-ENTRY (_ZGVeN8v_cos)
-        .type   _ZGVeN8v_cos, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-1:      leaq    _ZGVeN8v_cos_skx(%rip), %rax
-	HAS_ARCH_FEATURE (AVX512DQ_Usable)
-        jnz     2f
-        leaq    _ZGVeN8v_cos_knl(%rip), %rax
-	HAS_ARCH_FEATURE (AVX512F_Usable)
-        jnz     2f
-        leaq    _ZGVeN8v_cos_avx2_wrapper(%rip), %rax
-2:      ret
-END (_ZGVeN8v_cos)
-
 #define _ZGVeN8v_cos _ZGVeN8v_cos_avx2_wrapper
 #include "../svml_d_cos8_core.S"
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_cos8_core.c b/sysdeps/x86_64/fpu/multiarch/svml_d_cos8_core.c
new file mode 100644
index 0000000000..6d30baa3bd
--- /dev/null
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_cos8_core.c
@@ -0,0 +1,27 @@
+/* Multiple versions of vectorized cos, vector length is 8.
+   Copyright (C) 2017 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#define SYMBOL_NAME _ZGVeN8v_cos
+#include "ifunc-mathvec-avx512.h"
+
+libc_ifunc_redirected (REDIRECT_NAME, SYMBOL_NAME, IFUNC_SELECTOR ());
+
+#ifdef SHARED
+__hidden_ver1 (_ZGVeN8v_cos, __GI__ZGVeN8v_cos, __redirect__ZGVeN8v_cos)
+  __attribute__ ((visibility ("hidden")));
+#endif
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S b/sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core-sse2.S
index 5a17e11a0f..a66b82ccb8 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core-sse2.S
@@ -1,4 +1,4 @@
-/* Multiple versions of vectorized exp.
+/* SSE2 version of vectorized exp.
    Copyright (C) 2014-2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
@@ -16,21 +16,5 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
-#include <init-arch.h>
-
-	.text
-ENTRY (_ZGVbN2v_exp)
-        .type   _ZGVbN2v_exp, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVbN2v_exp_sse4(%rip), %rax
-	HAS_CPU_FEATURE (SSE4_1)
-        jz      2f
-        ret
-2:      leaq    _ZGVbN2v_exp_sse2(%rip), %rax
-        ret
-END (_ZGVbN2v_exp)
-libmvec_hidden_def (_ZGVbN2v_exp)
-
 #define _ZGVbN2v_exp _ZGVbN2v_exp_sse2
 #include "../svml_d_exp2_core.S"
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.c b/sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.c
new file mode 100644
index 0000000000..e24758d285
--- /dev/null
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.c
@@ -0,0 +1,27 @@
+/* Multiple versions of vectorized exp, vector length is 2.
+   Copyright (C) 2017 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#define SYMBOL_NAME _ZGVbN2v_exp
+#include "ifunc-mathvec-sse4_1.h"
+
+libc_ifunc_redirected (REDIRECT_NAME, SYMBOL_NAME, IFUNC_SELECTOR ());
+
+#ifdef SHARED
+__hidden_ver1 (_ZGVbN2v_exp, __GI__ZGVbN2v_exp, __redirect__ZGVbN2v_exp)
+  __attribute__ ((visibility ("hidden")));
+#endif
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_exp4_core.S b/sysdeps/x86_64/fpu/multiarch/svml_d_exp4_core-sse.S
index b994a794cd..613fae19ab 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_d_exp4_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_exp4_core-sse.S
@@ -1,4 +1,4 @@
-/* Multiple versions of vectorized exp.
+/* SSE version of vectorized exp.
    Copyright (C) 2014-2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
@@ -16,21 +16,5 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
-#include <init-arch.h>
-
-	.text
-ENTRY (_ZGVdN4v_exp)
-        .type   _ZGVdN4v_exp, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVdN4v_exp_avx2(%rip), %rax
-	HAS_ARCH_FEATURE (AVX2_Usable)
-        jz      2f
-        ret
-2:      leaq    _ZGVdN4v_exp_sse_wrapper(%rip), %rax
-        ret
-END (_ZGVdN4v_exp)
-libmvec_hidden_def (_ZGVdN4v_exp)
-
 #define _ZGVdN4v_exp _ZGVdN4v_exp_sse_wrapper
 #include "../svml_d_exp4_core.S"
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_exp4_core.c b/sysdeps/x86_64/fpu/multiarch/svml_d_exp4_core.c
new file mode 100644
index 0000000000..d3a9d87613
--- /dev/null
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_exp4_core.c
@@ -0,0 +1,27 @@
+/* Multiple versions of vectorized exp, vector length is 4.
+   Copyright (C) 2017 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#define SYMBOL_NAME _ZGVdN4v_exp
+#include "ifunc-mathvec-avx2.h"
+
+libc_ifunc_redirected (REDIRECT_NAME, SYMBOL_NAME, IFUNC_SELECTOR ());
+
+#ifdef SHARED
+__hidden_ver1 (_ZGVdN4v_exp, __GI__ZGVdN4v_exp, __redirect__ZGVdN4v_exp)
+  __attribute__ ((visibility ("hidden")));
+#endif
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_exp8_core.S b/sysdeps/x86_64/fpu/multiarch/svml_d_exp8_core-avx2.S
index 6189080fcc..9b95236fb8 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_d_exp8_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_exp8_core-avx2.S
@@ -1,4 +1,4 @@
-/* Multiple versions of vectorized exp.
+/* AVX2 version of vectorized exp.
    Copyright (C) 2014-2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
@@ -16,22 +16,5 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
-#include <init-arch.h>
-
-	.text
-ENTRY (_ZGVeN8v_exp)
-        .type   _ZGVeN8v_exp, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVeN8v_exp_skx(%rip), %rax
-	HAS_ARCH_FEATURE (AVX512DQ_Usable)
-        jnz     2f
-        leaq    _ZGVeN8v_exp_knl(%rip), %rax
-	HAS_ARCH_FEATURE (AVX512F_Usable)
-        jnz     2f
-        leaq    _ZGVeN8v_exp_avx2_wrapper(%rip), %rax
-2:      ret
-END (_ZGVeN8v_exp)
-
 #define _ZGVeN8v_exp _ZGVeN8v_exp_avx2_wrapper
 #include "../svml_d_exp8_core.S"
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_exp8_core.c b/sysdeps/x86_64/fpu/multiarch/svml_d_exp8_core.c
new file mode 100644
index 0000000000..cf8cd503e8
--- /dev/null
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_exp8_core.c
@@ -0,0 +1,27 @@
+/* Multiple versions of vectorized exp, vector length is 8.
+   Copyright (C) 2017 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#define SYMBOL_NAME _ZGVeN8v_exp
+#include "ifunc-mathvec-avx512.h"
+
+libc_ifunc_redirected (REDIRECT_NAME, SYMBOL_NAME, IFUNC_SELECTOR ());
+
+#ifdef SHARED
+__hidden_ver1 (_ZGVeN8v_exp, __GI__ZGVeN8v_exp, __redirect__ZGVeN8v_exp)
+  __attribute__ ((visibility ("hidden")));
+#endif
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_log2_core.S b/sysdeps/x86_64/fpu/multiarch/svml_d_log2_core-sse2.S
index 5097add6b5..a8bffccc56 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_d_log2_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_log2_core-sse2.S
@@ -1,4 +1,4 @@
-/* Multiple versions of vectorized log.
+/* SSE2 version of vectorized log.
    Copyright (C) 2014-2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
@@ -16,21 +16,5 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
-#include <init-arch.h>
-
-        .text
-ENTRY (_ZGVbN2v_log)
-        .type   _ZGVbN2v_log, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVbN2v_log_sse4(%rip), %rax
-	HAS_CPU_FEATURE (SSE4_1)
-        jz      2f
-        ret
-2:      leaq    _ZGVbN2v_log_sse2(%rip), %rax
-        ret
-END (_ZGVbN2v_log)
-libmvec_hidden_def (_ZGVbN2v_log)
-
 #define _ZGVbN2v_log _ZGVbN2v_log_sse2
 #include "../svml_d_log2_core.S"
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_log2_core.c b/sysdeps/x86_64/fpu/multiarch/svml_d_log2_core.c
new file mode 100644
index 0000000000..2fcc08ab50
--- /dev/null
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_log2_core.c
@@ -0,0 +1,27 @@
+/* Multiple versions of vectorized log, vector length is 2.
+   Copyright (C) 2017 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#define SYMBOL_NAME _ZGVbN2v_log
+#include "ifunc-mathvec-sse4_1.h"
+
+libc_ifunc_redirected (REDIRECT_NAME, SYMBOL_NAME, IFUNC_SELECTOR ());
+
+#ifdef SHARED
+__hidden_ver1 (_ZGVbN2v_log, __GI__ZGVbN2v_log, __redirect__ZGVbN2v_log)
+  __attribute__ ((visibility ("hidden")));
+#endif
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_log4_core.S b/sysdeps/x86_64/fpu/multiarch/svml_d_log4_core-sse.S
index 1e9a2f48a1..0760b041be 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_d_log4_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_log4_core-sse.S
@@ -1,4 +1,4 @@
-/* Multiple versions of vectorized log.
+/* SSE version of vectorized log.
    Copyright (C) 2014-2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
@@ -16,21 +16,5 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
-#include <init-arch.h>
-
-	.text
-ENTRY (_ZGVdN4v_log)
-        .type   _ZGVdN4v_log, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVdN4v_log_avx2(%rip), %rax
-	HAS_ARCH_FEATURE (AVX2_Usable)
-        jz      2f
-        ret
-2:      leaq    _ZGVdN4v_log_sse_wrapper(%rip), %rax
-        ret
-END (_ZGVdN4v_log)
-libmvec_hidden_def (_ZGVdN4v_log)
-
 #define _ZGVdN4v_log _ZGVdN4v_log_sse_wrapper
 #include "../svml_d_log4_core.S"
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_log4_core.c b/sysdeps/x86_64/fpu/multiarch/svml_d_log4_core.c
new file mode 100644
index 0000000000..1756978e7c
--- /dev/null
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_log4_core.c
@@ -0,0 +1,27 @@
+/* Multiple versions of vectorized log, vector length is 4.
+   Copyright (C) 2017 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#define SYMBOL_NAME _ZGVdN4v_log
+#include "ifunc-mathvec-avx2.h"
+
+libc_ifunc_redirected (REDIRECT_NAME, SYMBOL_NAME, IFUNC_SELECTOR ());
+
+#ifdef SHARED
+__hidden_ver1 (_ZGVdN4v_log, __GI__ZGVdN4v_log, __redirect__ZGVdN4v_log)
+  __attribute__ ((visibility ("hidden")));
+#endif
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_log8_core.S b/sysdeps/x86_64/fpu/multiarch/svml_d_log8_core-avx2.S
index 43f572d36c..af3229f9a3 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_d_log8_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_log8_core-avx2.S
@@ -1,4 +1,4 @@
-/* Multiple versions of vectorized log.
+/* AVX2 version of vectorized log.
    Copyright (C) 2014-2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
@@ -16,22 +16,5 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
-#include <init-arch.h>
-
-	.text
-ENTRY (_ZGVeN8v_log)
-        .type   _ZGVeN8v_log, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVeN8v_log_skx(%rip), %rax
-	HAS_ARCH_FEATURE (AVX512DQ_Usable)
-        jnz     2f
-        leaq    _ZGVeN8v_log_knl(%rip), %rax
-	HAS_ARCH_FEATURE (AVX512F_Usable)
-        jnz     2f
-        leaq    _ZGVeN8v_log_avx2_wrapper(%rip), %rax
-2:      ret
-END (_ZGVeN8v_log)
-
 #define _ZGVeN8v_log _ZGVeN8v_log_avx2_wrapper
 #include "../svml_d_log8_core.S"
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_log8_core.c b/sysdeps/x86_64/fpu/multiarch/svml_d_log8_core.c
new file mode 100644
index 0000000000..1d9864c265
--- /dev/null
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_log8_core.c
@@ -0,0 +1,27 @@
+/* Multiple versions of vectorized log, vector length is 8.
+   Copyright (C) 2017 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#define SYMBOL_NAME _ZGVeN8v_log
+#include "ifunc-mathvec-avx512.h"
+
+libc_ifunc_redirected (REDIRECT_NAME, SYMBOL_NAME, IFUNC_SELECTOR ());
+
+#ifdef SHARED
+__hidden_ver1 (_ZGVeN8v_log, __GI__ZGVeN8v_log, __redirect__ZGVeN8v_log)
+  __attribute__ ((visibility ("hidden")));
+#endif
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_pow2_core.S b/sysdeps/x86_64/fpu/multiarch/svml_d_pow2_core-sse2.S
index adb0872e56..2e8d40b5f5 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_d_pow2_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_pow2_core-sse2.S
@@ -1,4 +1,4 @@
-/* Multiple versions of vectorized pow.
+/* SSE2 version of vectorized pow.
    Copyright (C) 2014-2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
@@ -16,21 +16,5 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
-#include <init-arch.h>
-
-	.text
-ENTRY (_ZGVbN2vv_pow)
-        .type   _ZGVbN2vv_pow, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVbN2vv_pow_sse4(%rip), %rax
-	HAS_CPU_FEATURE (SSE4_1)
-        jz      2f
-        ret
-2:      leaq    _ZGVbN2vv_pow_sse2(%rip), %rax
-        ret
-END (_ZGVbN2vv_pow)
-libmvec_hidden_def (_ZGVbN2vv_pow)
-
 #define _ZGVbN2vv_pow _ZGVbN2vv_pow_sse2
 #include "../svml_d_pow2_core.S"
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_pow2_core.c b/sysdeps/x86_64/fpu/multiarch/svml_d_pow2_core.c
new file mode 100644
index 0000000000..bc72a77cd8
--- /dev/null
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_pow2_core.c
@@ -0,0 +1,28 @@
+/* Multiple versions of vectorized pow, vector length is 2.
+   Copyright (C) 2017 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#define SYMBOL_NAME _ZGVbN2vv_pow
+#include "ifunc-mathvec-sse4_1.h"
+
+libc_ifunc_redirected (REDIRECT_NAME, SYMBOL_NAME, IFUNC_SELECTOR ());
+
+#ifdef SHARED
+__hidden_ver1 (_ZGVbN2vv_pow, __GI__ZGVbN2vv_pow,
+	       __redirect__ZGVbN2vv_pow)
+  __attribute__ ((visibility ("hidden")));
+#endif
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_pow4_core.S b/sysdeps/x86_64/fpu/multiarch/svml_d_pow4_core-sse.S
index eea8af6638..7f17a7c869 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_d_pow4_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_pow4_core-sse.S
@@ -1,4 +1,4 @@
-/* Multiple versions of vectorized pow.
+/* SSE version of vectorized pow.
    Copyright (C) 2014-2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
@@ -16,21 +16,5 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
-#include <init-arch.h>
-
-	.text
-ENTRY (_ZGVdN4vv_pow)
-        .type   _ZGVdN4vv_pow, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVdN4vv_pow_avx2(%rip), %rax
-	HAS_ARCH_FEATURE (AVX2_Usable)
-        jz      2f
-        ret
-2:      leaq    _ZGVdN4vv_pow_sse_wrapper(%rip), %rax
-        ret
-END (_ZGVdN4vv_pow)
-libmvec_hidden_def (_ZGVdN4vv_pow)
-
 #define _ZGVdN4vv_pow _ZGVdN4vv_pow_sse_wrapper
 #include "../svml_d_pow4_core.S"
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_pow4_core.c b/sysdeps/x86_64/fpu/multiarch/svml_d_pow4_core.c
new file mode 100644
index 0000000000..f4b4db0e83
--- /dev/null
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_pow4_core.c
@@ -0,0 +1,28 @@
+/* Multiple versions of vectorized pow, vector length is 4.
+   Copyright (C) 2017 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#define SYMBOL_NAME _ZGVdN4vv_pow
+#include "ifunc-mathvec-avx2.h"
+
+libc_ifunc_redirected (REDIRECT_NAME, SYMBOL_NAME, IFUNC_SELECTOR ());
+
+#ifdef SHARED
+__hidden_ver1 (_ZGVdN4vv_pow, __GI__ZGVdN4vv_pow,
+	       __redirect__ZGVdN4vv_pow)
+  __attribute__ ((visibility ("hidden")));
+#endif
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_pow8_core.S b/sysdeps/x86_64/fpu/multiarch/svml_d_pow8_core-avx2.S
index 68f12b2848..02a4bdd656 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_d_pow8_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_pow8_core-avx2.S
@@ -1,4 +1,4 @@
-/* Multiple versions of vectorized pow.
+/* AVX2 version of vectorized pow.
    Copyright (C) 2014-2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
@@ -16,22 +16,5 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
-#include <init-arch.h>
-
-	.text
-ENTRY (_ZGVeN8vv_pow)
-        .type   _ZGVeN8vv_pow, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVeN8vv_pow_skx(%rip), %rax
-	HAS_ARCH_FEATURE (AVX512DQ_Usable)
-        jnz     2f
-        leaq    _ZGVeN8vv_pow_knl(%rip), %rax
-	HAS_ARCH_FEATURE (AVX512F_Usable)
-        jnz     2f
-        leaq    _ZGVeN8vv_pow_avx2_wrapper(%rip), %rax
-2:      ret
-END (_ZGVeN8vv_pow)
-
 #define _ZGVeN8vv_pow _ZGVeN8vv_pow_avx2_wrapper
 #include "../svml_d_pow8_core.S"
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_pow8_core.c b/sysdeps/x86_64/fpu/multiarch/svml_d_pow8_core.c
new file mode 100644
index 0000000000..178f581924
--- /dev/null
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_pow8_core.c
@@ -0,0 +1,28 @@
+/* Multiple versions of vectorized pow, vector length is 8.
+   Copyright (C) 2017 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#define SYMBOL_NAME _ZGVeN8vv_pow
+#include "ifunc-mathvec-avx512.h"
+
+libc_ifunc_redirected (REDIRECT_NAME, SYMBOL_NAME, IFUNC_SELECTOR ());
+
+#ifdef SHARED
+__hidden_ver1 (_ZGVeN8vv_pow, __GI__ZGVeN8vv_pow,
+	       __redirect__ZGVeN8vv_pow)
+  __attribute__ ((visibility ("hidden")));
+#endif
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_sin2_core.S b/sysdeps/x86_64/fpu/multiarch/svml_d_sin2_core-sse2.S
index e35654be8d..9b49c3cd33 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_d_sin2_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_sin2_core-sse2.S
@@ -1,4 +1,4 @@
-/* Multiple versions of vectorized sin.
+/* SSE2 version of vectorized sin.
    Copyright (C) 2014-2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
@@ -16,21 +16,5 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
-#include <init-arch.h>
-
-	.text
-ENTRY (_ZGVbN2v_sin)
-        .type   _ZGVbN2v_sin, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVbN2v_sin_sse4(%rip), %rax
-	HAS_CPU_FEATURE (SSE4_1)
-        jz      2f
-        ret
-2:      leaq    _ZGVbN2v_sin_sse2(%rip), %rax
-        ret
-END (_ZGVbN2v_sin)
-libmvec_hidden_def (_ZGVbN2v_sin)
-
 #define _ZGVbN2v_sin _ZGVbN2v_sin_sse2
 #include "../svml_d_sin2_core.S"
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_sin2_core.c b/sysdeps/x86_64/fpu/multiarch/svml_d_sin2_core.c
new file mode 100644
index 0000000000..a0995e73d3
--- /dev/null
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_sin2_core.c
@@ -0,0 +1,27 @@
+/* Multiple versions of vectorized sin, vector length is 2.
+   Copyright (C) 2017 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#define SYMBOL_NAME _ZGVbN2v_sin
+#include "ifunc-mathvec-sse4_1.h"
+
+libc_ifunc_redirected (REDIRECT_NAME, SYMBOL_NAME, IFUNC_SELECTOR ());
+
+#ifdef SHARED
+__hidden_ver1 (_ZGVbN2v_sin, __GI__ZGVbN2v_sin, __redirect__ZGVbN2v_sin)
+  __attribute__ ((visibility ("hidden")));
+#endif
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_sin4_core.S b/sysdeps/x86_64/fpu/multiarch/svml_d_sin4_core-sse.S
index f4482d3a11..0f27cef8d1 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_d_sin4_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_sin4_core-sse.S
@@ -1,4 +1,4 @@
-/* Multiple versions of vectorized sin, vector length is 4.
+/* SSE version of vectorized sin, vector length is 4.
    Copyright (C) 2014-2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
@@ -16,21 +16,5 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
-#include <init-arch.h>
-
-	.text
-ENTRY (_ZGVdN4v_sin)
-        .type   _ZGVdN4v_sin, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVdN4v_sin_avx2(%rip), %rax
-	HAS_ARCH_FEATURE (AVX2_Usable)
-        jz      2f
-        ret
-2:      leaq    _ZGVdN4v_sin_sse_wrapper(%rip), %rax
-        ret
-END (_ZGVdN4v_sin)
-libmvec_hidden_def (_ZGVdN4v_sin)
-
 #define _ZGVdN4v_sin _ZGVdN4v_sin_sse_wrapper
 #include "../svml_d_sin4_core.S"
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_sin4_core.c b/sysdeps/x86_64/fpu/multiarch/svml_d_sin4_core.c
new file mode 100644
index 0000000000..44ff161e51
--- /dev/null
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_sin4_core.c
@@ -0,0 +1,27 @@
+/* Multiple versions of vectorized sin, vector length is 4.
+   Copyright (C) 2017 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#define SYMBOL_NAME _ZGVdN4v_sin
+#include "ifunc-mathvec-avx2.h"
+
+libc_ifunc_redirected (REDIRECT_NAME, SYMBOL_NAME, IFUNC_SELECTOR ());
+
+#ifdef SHARED
+__hidden_ver1 (_ZGVdN4v_sin, __GI__ZGVdN4v_sin, __redirect__ZGVdN4v_sin)
+  __attribute__ ((visibility ("hidden")));
+#endif
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_sin8_core.S b/sysdeps/x86_64/fpu/multiarch/svml_d_sin8_core-avx2.S
index 2b15889c71..89cabc3f86 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_d_sin8_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_sin8_core-avx2.S
@@ -1,4 +1,4 @@
-/* Multiple versions of vectorized sin.
+/* AVX2 version of vectorized sin.
    Copyright (C) 2014-2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
@@ -19,19 +19,5 @@
 #include <sysdep.h>
 #include <init-arch.h>
 
-	.text
-ENTRY (_ZGVeN8v_sin)
-        .type   _ZGVeN8v_sin, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVeN8v_sin_skx(%rip), %rax
-	HAS_ARCH_FEATURE (AVX512DQ_Usable)
-        jnz     2f
-        leaq    _ZGVeN8v_sin_knl(%rip), %rax
-	HAS_ARCH_FEATURE (AVX512F_Usable)
-        jnz     2f
-        leaq    _ZGVeN8v_sin_avx2_wrapper(%rip), %rax
-2:      ret
-END (_ZGVeN8v_sin)
-
 #define _ZGVeN8v_sin _ZGVeN8v_sin_avx2_wrapper
 #include "../svml_d_sin8_core.S"
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_sin8_core.c b/sysdeps/x86_64/fpu/multiarch/svml_d_sin8_core.c
new file mode 100644
index 0000000000..0391268ecc
--- /dev/null
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_sin8_core.c
@@ -0,0 +1,27 @@
+/* Multiple versions of vectorized sin, vector length is 8.
+   Copyright (C) 2017 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#define SYMBOL_NAME _ZGVeN8v_sin
+#include "ifunc-mathvec-avx512.h"
+
+libc_ifunc_redirected (REDIRECT_NAME, SYMBOL_NAME, IFUNC_SELECTOR ());
+
+#ifdef SHARED
+__hidden_ver1 (_ZGVeN8v_sin, __GI__ZGVeN8v_sin, __redirect__ZGVeN8v_sin)
+  __attribute__ ((visibility ("hidden")));
+#endif
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_sincos2_core.S b/sysdeps/x86_64/fpu/multiarch/svml_d_sincos2_core-sse2.S
index 13279e3fb7..7c15800ddb 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_d_sincos2_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_sincos2_core-sse2.S
@@ -1,4 +1,4 @@
-/* Multiple versions of vectorized sincos.
+/* SSE2 version of vectorized sincos.
    Copyright (C) 2014-2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
@@ -16,21 +16,5 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
-#include <init-arch.h>
-
-	.text
-ENTRY (_ZGVbN2vvv_sincos)
-        .type   _ZGVbN2vvv_sincos, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVbN2vvv_sincos_sse4(%rip), %rax
-	HAS_CPU_FEATURE (SSE4_1)
-        jz      2f
-        ret
-2:      leaq    _ZGVbN2vvv_sincos_sse2(%rip), %rax
-        ret
-END (_ZGVbN2vvv_sincos)
-libmvec_hidden_def (_ZGVbN2vvv_sincos)
-
 #define _ZGVbN2vvv_sincos _ZGVbN2vvv_sincos_sse2
 #include "../svml_d_sincos2_core.S"
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_sincos2_core.c b/sysdeps/x86_64/fpu/multiarch/svml_d_sincos2_core.c
new file mode 100644
index 0000000000..590289467b
--- /dev/null
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_sincos2_core.c
@@ -0,0 +1,28 @@
+/* Multiple versions of vectorized sincos, vector length is 2.
+   Copyright (C) 2017 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#define SYMBOL_NAME _ZGVbN2vvv_sincos
+#include "ifunc-mathvec-sse4_1.h"
+
+libc_ifunc_redirected (REDIRECT_NAME, SYMBOL_NAME, IFUNC_SELECTOR ());
+
+#ifdef SHARED
+__hidden_ver1 (_ZGVbN2vvv_sincos, __GI__ZGVbN2vvv_sincos,
+	       __redirect__ZGVbN2vvv_sincos)
+  __attribute__ ((visibility ("hidden")));
+#endif
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_sincos4_core.S b/sysdeps/x86_64/fpu/multiarch/svml_d_sincos4_core-sse.S
index 8aacb8e76a..739efc30a0 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_d_sincos4_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_sincos4_core-sse.S
@@ -1,4 +1,4 @@
-/* Multiple versions of vectorized sincos.
+/* SSE version of vectorized sincos.
    Copyright (C) 2014-2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
@@ -16,21 +16,5 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
-#include <init-arch.h>
-
-	.text
-ENTRY (_ZGVdN4vvv_sincos)
-        .type   _ZGVdN4vvv_sincos, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVdN4vvv_sincos_avx2(%rip), %rax
-	HAS_ARCH_FEATURE (AVX2_Usable)
-        jz      2f
-        ret
-2:      leaq    _ZGVdN4vvv_sincos_sse_wrapper(%rip), %rax
-        ret
-END (_ZGVdN4vvv_sincos)
-libmvec_hidden_def (_ZGVdN4vvv_sincos)
-
 #define _ZGVdN4vvv_sincos _ZGVdN4vvv_sincos_sse_wrapper
 #include "../svml_d_sincos4_core.S"
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_sincos4_core.c b/sysdeps/x86_64/fpu/multiarch/svml_d_sincos4_core.c
new file mode 100644
index 0000000000..d55aa6f70b
--- /dev/null
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_sincos4_core.c
@@ -0,0 +1,28 @@
+/* Multiple versions of vectorized sincos, vector length is 4.
+   Copyright (C) 2017 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#define SYMBOL_NAME _ZGVdN4vvv_sincos
+#include "ifunc-mathvec-avx2.h"
+
+libc_ifunc_redirected (REDIRECT_NAME, SYMBOL_NAME, IFUNC_SELECTOR ());
+
+#ifdef SHARED
+__hidden_ver1 (_ZGVdN4vvv_sincos, __GI__ZGVdN4vvv_sincos,
+	       __redirect__ZGVdN4vvv_sincos)
+  __attribute__ ((visibility ("hidden")));
+#endif
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_sincos8_core.S b/sysdeps/x86_64/fpu/multiarch/svml_d_sincos8_core-avx2.S
index 3c0abc379e..026d93ce8c 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_d_sincos8_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_sincos8_core-avx2.S
@@ -1,4 +1,4 @@
-/* Multiple versions of vectorized sincos.
+/* AVX2 version of vectorized sincos.
    Copyright (C) 2014-2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
@@ -16,22 +16,5 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
-#include <init-arch.h>
-
-	.text
-ENTRY (_ZGVeN8vvv_sincos)
-        .type   _ZGVeN8vvv_sincos, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVeN8vvv_sincos_skx(%rip), %rax
-	HAS_ARCH_FEATURE (AVX512DQ_Usable)
-        jnz     2f
-        leaq    _ZGVeN8vvv_sincos_knl(%rip), %rax
-	HAS_ARCH_FEATURE (AVX512F_Usable)
-        jnz     2f
-        leaq    _ZGVeN8vvv_sincos_avx2_wrapper(%rip), %rax
-2:      ret
-END (_ZGVeN8vvv_sincos)
-
 #define _ZGVeN8vvv_sincos _ZGVeN8vvv_sincos_avx2_wrapper
 #include "../svml_d_sincos8_core.S"
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_sincos8_core.c b/sysdeps/x86_64/fpu/multiarch/svml_d_sincos8_core.c
new file mode 100644
index 0000000000..f78146f551
--- /dev/null
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_sincos8_core.c
@@ -0,0 +1,28 @@
+/* Multiple versions of vectorized sincos, vector length is 8.
+   Copyright (C) 2017 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#define SYMBOL_NAME _ZGVeN8vvv_sincos
+#include "ifunc-mathvec-avx512.h"
+
+libc_ifunc_redirected (REDIRECT_NAME, SYMBOL_NAME, IFUNC_SELECTOR ());
+
+#ifdef SHARED
+__hidden_ver1 (_ZGVeN8vvv_sincos, __GI__ZGVeN8vvv_sincos,
+	       __redirect__ZGVeN8vvv_sincos)
+  __attribute__ ((visibility ("hidden")));
+#endif
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_cosf16_core.S b/sysdeps/x86_64/fpu/multiarch/svml_s_cosf16_core-avx2.S
index cd67665972..f9c00239cb 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_s_cosf16_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_cosf16_core-avx2.S
@@ -1,4 +1,4 @@
-/* Multiple versions of vectorized cosf.
+/* AVX2 version of vectorized cosf.
    Copyright (C) 2014-2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
@@ -16,22 +16,5 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
-#include <init-arch.h>
-
-	.text
-ENTRY (_ZGVeN16v_cosf)
-        .type   _ZGVeN16v_cosf, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVeN16v_cosf_skx(%rip), %rax
-	HAS_ARCH_FEATURE (AVX512DQ_Usable)
-        jnz     2f
-        leaq    _ZGVeN16v_cosf_knl(%rip), %rax
-	HAS_ARCH_FEATURE (AVX512F_Usable)
-        jnz     2f
-        leaq    _ZGVeN16v_cosf_avx2_wrapper(%rip), %rax
-2:      ret
-END (_ZGVeN16v_cosf)
-
 #define _ZGVeN16v_cosf _ZGVeN16v_cosf_avx2_wrapper
 #include "../svml_s_cosf16_core.S"
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_cosf16_core.c b/sysdeps/x86_64/fpu/multiarch/svml_s_cosf16_core.c
new file mode 100644
index 0000000000..186c01213b
--- /dev/null
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_cosf16_core.c
@@ -0,0 +1,28 @@
+/* Multiple versions of vectorized cosf, vector length is 16.
+   Copyright (C) 2017 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#define SYMBOL_NAME _ZGVeN16v_cosf
+#include "ifunc-mathvec-avx512.h"
+
+libc_ifunc_redirected (REDIRECT_NAME, SYMBOL_NAME, IFUNC_SELECTOR ());
+
+#ifdef SHARED
+__hidden_ver1 (_ZGVeN16v_cosf, __GI__ZGVeN16v_cosf,
+	       __redirect__ZGVeN16v_cosf)
+  __attribute__ ((visibility ("hidden")));
+#endif
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_cosf4_core.S b/sysdeps/x86_64/fpu/multiarch/svml_s_cosf4_core-sse2.S
index d73d7c7e3f..6a4ba6a8e2 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_s_cosf4_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_cosf4_core-sse2.S
@@ -1,4 +1,4 @@
-/* Multiple versions of vectorized cosf, vector length is 4.
+/* SSE2 version of vectorized cosf, vector length is 4.
    Copyright (C) 2014-2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
@@ -16,21 +16,5 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
-#include <init-arch.h>
-
-	.text
-ENTRY (_ZGVbN4v_cosf)
-        .type   _ZGVbN4v_cosf, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVbN4v_cosf_sse4(%rip), %rax
-	HAS_CPU_FEATURE (SSE4_1)
-        jz      2f
-        ret
-2:      leaq    _ZGVbN4v_cosf_sse2(%rip), %rax
-        ret
-END (_ZGVbN4v_cosf)
-libmvec_hidden_def (_ZGVbN4v_cosf)
-
 #define _ZGVbN4v_cosf _ZGVbN4v_cosf_sse2
 #include "../svml_s_cosf4_core.S"
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_cosf4_core.c b/sysdeps/x86_64/fpu/multiarch/svml_s_cosf4_core.c
new file mode 100644
index 0000000000..8eb5e03610
--- /dev/null
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_cosf4_core.c
@@ -0,0 +1,28 @@
+/* Multiple versions of vectorized cosf, vector length is 4.
+   Copyright (C) 2017 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#define SYMBOL_NAME _ZGVbN4v_cosf
+#include "ifunc-mathvec-sse4_1.h"
+
+libc_ifunc_redirected (REDIRECT_NAME, SYMBOL_NAME, IFUNC_SELECTOR ());
+
+#ifdef SHARED
+__hidden_ver1 (_ZGVbN4v_cosf, __GI__ZGVbN4v_cosf,
+	       __redirect__ZGVbN4v_cosf)
+  __attribute__ ((visibility ("hidden")));
+#endif
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_cosf8_core.S b/sysdeps/x86_64/fpu/multiarch/svml_s_cosf8_core-sse.S
index f7530c138a..3a4741bb97 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_s_cosf8_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_cosf8_core-sse.S
@@ -1,4 +1,4 @@
-/* Multiple versions of vectorized cosf, vector length is 8.
+/* SSE version of vectorized cosf, vector length is 8.
    Copyright (C) 2014-2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
@@ -16,21 +16,5 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
-#include <init-arch.h>
-
-	.text
-ENTRY (_ZGVdN8v_cosf)
-        .type   _ZGVdN8v_cosf, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVdN8v_cosf_avx2(%rip), %rax
-	HAS_ARCH_FEATURE (AVX2_Usable)
-        jz      2f
-        ret
-2:      leaq    _ZGVdN8v_cosf_sse_wrapper(%rip), %rax
-        ret
-END (_ZGVdN8v_cosf)
-libmvec_hidden_def (_ZGVdN8v_cosf)
-
 #define _ZGVdN8v_cosf _ZGVdN8v_cosf_sse_wrapper
 #include "../svml_s_cosf8_core.S"
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_cosf8_core.c b/sysdeps/x86_64/fpu/multiarch/svml_s_cosf8_core.c
new file mode 100644
index 0000000000..13d2e9d3cc
--- /dev/null
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_cosf8_core.c
@@ -0,0 +1,28 @@
+/* Multiple versions of vectorized cosf, vector length is 8.
+   Copyright (C) 2017 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#define SYMBOL_NAME _ZGVdN8v_cosf
+#include "ifunc-mathvec-avx2.h"
+
+libc_ifunc_redirected (REDIRECT_NAME, SYMBOL_NAME, IFUNC_SELECTOR ());
+
+#ifdef SHARED
+__hidden_ver1 (_ZGVdN8v_cosf, __GI__ZGVdN8v_cosf,
+	       __redirect__ZGVdN8v_cosf)
+  __attribute__ ((visibility ("hidden")));
+#endif
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_expf16_core.S b/sysdeps/x86_64/fpu/multiarch/svml_s_expf16_core-avx2.S
index 3998f616aa..9ff196e55c 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_s_expf16_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_expf16_core-avx2.S
@@ -1,4 +1,4 @@
-/* Multiple versions of vectorized expf.
+/* AVX2 version of vectorized expf.
    Copyright (C) 2014-2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
@@ -19,19 +19,5 @@
 #include <sysdep.h>
 #include <init-arch.h>
 
-	.text
-ENTRY (_ZGVeN16v_expf)
-        .type   _ZGVeN16v_expf, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVeN16v_expf_skx(%rip), %rax
-	HAS_ARCH_FEATURE (AVX512DQ_Usable)
-        jnz     2f
-        leaq    _ZGVeN16v_expf_knl(%rip), %rax
-	HAS_ARCH_FEATURE (AVX512F_Usable)
-        jnz     2f
-        leaq    _ZGVeN16v_expf_avx2_wrapper(%rip), %rax
-2:      ret
-END (_ZGVeN16v_expf)
-
 #define _ZGVeN16v_expf _ZGVeN16v_expf_avx2_wrapper
 #include "../svml_s_expf16_core.S"
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_expf16_core.c b/sysdeps/x86_64/fpu/multiarch/svml_s_expf16_core.c
new file mode 100644
index 0000000000..42566ac2b1
--- /dev/null
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_expf16_core.c
@@ -0,0 +1,28 @@
+/* Multiple versions of vectorized expf, vector length is 16.
+   Copyright (C) 2017 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#define SYMBOL_NAME _ZGVeN16v_expf
+#include "ifunc-mathvec-avx512.h"
+
+libc_ifunc_redirected (REDIRECT_NAME, SYMBOL_NAME, IFUNC_SELECTOR ());
+
+#ifdef SHARED
+__hidden_ver1 (_ZGVeN16v_expf, __GI__ZGVeN16v_expf,
+	       __redirect__ZGVeN16v_expf)
+  __attribute__ ((visibility ("hidden")));
+#endif
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_expf4_core.S b/sysdeps/x86_64/fpu/multiarch/svml_s_expf4_core-sse2.S
index 8051720ec2..393e420b11 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_s_expf4_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_expf4_core-sse2.S
@@ -1,4 +1,4 @@
-/* Multiple versions of vectorized expf.
+/* SSE2 version of vectorized expf.
    Copyright (C) 2014-2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
@@ -16,21 +16,5 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
-#include <init-arch.h>
-
-	.text
-ENTRY (_ZGVbN4v_expf)
-        .type   _ZGVbN4v_expf, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVbN4v_expf_sse4(%rip), %rax
-	HAS_CPU_FEATURE (SSE4_1)
-        jz      2f
-        ret
-2:      leaq    _ZGVbN4v_expf_sse2(%rip), %rax
-        ret
-END (_ZGVbN4v_expf)
-libmvec_hidden_def (_ZGVbN4v_expf)
-
 #define _ZGVbN4v_expf _ZGVbN4v_expf_sse2
 #include "../svml_s_expf4_core.S"
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_expf4_core.c b/sysdeps/x86_64/fpu/multiarch/svml_s_expf4_core.c
new file mode 100644
index 0000000000..5218e3dd84
--- /dev/null
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_expf4_core.c
@@ -0,0 +1,28 @@
+/* Multiple versions of vectorized expf, vector length is 4.
+   Copyright (C) 2017 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#define SYMBOL_NAME _ZGVbN4v_expf
+#include "ifunc-mathvec-sse4_1.h"
+
+libc_ifunc_redirected (REDIRECT_NAME, SYMBOL_NAME, IFUNC_SELECTOR ());
+
+#ifdef SHARED
+__hidden_ver1 (_ZGVbN4v_expf, __GI__ZGVbN4v_expf,
+	       __redirect__ZGVbN4v_expf)
+  __attribute__ ((visibility ("hidden")));
+#endif
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_expf8_core.S b/sysdeps/x86_64/fpu/multiarch/svml_s_expf8_core-sse.S
index 6ffb1fd784..a75b601bb2 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_s_expf8_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_expf8_core-sse.S
@@ -1,4 +1,4 @@
-/* Multiple versions of vectorized expf.
+/* SSE version of vectorized expf.
    Copyright (C) 2014-2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
@@ -16,21 +16,5 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
-#include <init-arch.h>
-
-	.text
-ENTRY (_ZGVdN8v_expf)
-        .type   _ZGVdN8v_expf, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVdN8v_expf_avx2(%rip), %rax
-	HAS_ARCH_FEATURE (AVX2_Usable)
-        jz      2f
-        ret
-2:      leaq    _ZGVdN8v_expf_sse_wrapper(%rip), %rax
-        ret
-END (_ZGVdN8v_expf)
-libmvec_hidden_def (_ZGVdN8v_expf)
-
 #define _ZGVdN8v_expf _ZGVdN8v_expf_sse_wrapper
 #include "../svml_s_expf8_core.S"
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_expf8_core.c b/sysdeps/x86_64/fpu/multiarch/svml_s_expf8_core.c
new file mode 100644
index 0000000000..6badac43f9
--- /dev/null
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_expf8_core.c
@@ -0,0 +1,28 @@
+/* Multiple versions of vectorized expf, vector length is 8.
+   Copyright (C) 2017 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#define SYMBOL_NAME _ZGVdN8v_expf
+#include "ifunc-mathvec-avx2.h"
+
+libc_ifunc_redirected (REDIRECT_NAME, SYMBOL_NAME, IFUNC_SELECTOR ());
+
+#ifdef SHARED
+__hidden_ver1 (_ZGVdN8v_expf, __GI__ZGVdN8v_expf,
+	       __redirect__ZGVdN8v_expf)
+  __attribute__ ((visibility ("hidden")));
+#endif
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_logf16_core.S b/sysdeps/x86_64/fpu/multiarch/svml_s_logf16_core-avx2.S
index 8ab03195c6..2a87049fa8 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_s_logf16_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_logf16_core-avx2.S
@@ -1,4 +1,4 @@
-/* Multiple versions of vectorized logf.
+/* AVX2 version of vectorized logf.
    Copyright (C) 2014-2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
@@ -16,22 +16,5 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
-#include <init-arch.h>
-
-	.text
-ENTRY (_ZGVeN16v_logf)
-        .type   _ZGVeN16v_logf, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVeN16v_logf_skx(%rip), %rax
-	HAS_ARCH_FEATURE (AVX512DQ_Usable)
-        jnz     2f
-        leaq    _ZGVeN16v_logf_knl(%rip), %rax
-	HAS_ARCH_FEATURE (AVX512F_Usable)
-        jnz     2f
-        leaq    _ZGVeN16v_logf_avx2_wrapper(%rip), %rax
-2:      ret
-END (_ZGVeN16v_logf)
-
 #define _ZGVeN16v_logf _ZGVeN16v_logf_avx2_wrapper
 #include "../svml_s_logf16_core.S"
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_logf16_core.c b/sysdeps/x86_64/fpu/multiarch/svml_s_logf16_core.c
new file mode 100644
index 0000000000..81c56538c0
--- /dev/null
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_logf16_core.c
@@ -0,0 +1,28 @@
+/* Multiple versions of vectorized logf, vector length is 16.
+   Copyright (C) 2017 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#define SYMBOL_NAME _ZGVeN16v_logf
+#include "ifunc-mathvec-avx512.h"
+
+libc_ifunc_redirected (REDIRECT_NAME, SYMBOL_NAME, IFUNC_SELECTOR ());
+
+#ifdef SHARED
+__hidden_ver1 (_ZGVeN16v_logf, __GI__ZGVeN16v_logf,
+	       __redirect__ZGVeN16v_logf)
+  __attribute__ ((visibility ("hidden")));
+#endif
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_logf4_core.S b/sysdeps/x86_64/fpu/multiarch/svml_s_logf4_core-sse2.S
index 4e0e36d5bd..f6ef828563 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_s_logf4_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_logf4_core-sse2.S
@@ -1,4 +1,4 @@
-/* Multiple versions of vectorized logf.
+/* SSE2 version of vectorized logf.
    Copyright (C) 2014-2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
@@ -16,21 +16,5 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
-#include <init-arch.h>
-
-	.text
-ENTRY (_ZGVbN4v_logf)
-        .type   _ZGVbN4v_logf, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVbN4v_logf_sse4(%rip), %rax
-	HAS_CPU_FEATURE (SSE4_1)
-        jz      2f
-        ret
-2:      leaq    _ZGVbN4v_logf_sse2(%rip), %rax
-        ret
-END (_ZGVbN4v_logf)
-libmvec_hidden_def (_ZGVbN4v_logf)
-
 #define _ZGVbN4v_logf _ZGVbN4v_logf_sse2
 #include "../svml_s_logf4_core.S"
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_logf4_core.c b/sysdeps/x86_64/fpu/multiarch/svml_s_logf4_core.c
new file mode 100644
index 0000000000..a32855e6d9
--- /dev/null
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_logf4_core.c
@@ -0,0 +1,28 @@
+/* Multiple versions of vectorized logf, vector length is 4.
+   Copyright (C) 2017 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#define SYMBOL_NAME _ZGVbN4v_logf
+#include "ifunc-mathvec-sse4_1.h"
+
+libc_ifunc_redirected (REDIRECT_NAME, SYMBOL_NAME, IFUNC_SELECTOR ());
+
+#ifdef SHARED
+__hidden_ver1 (_ZGVbN4v_logf, __GI__ZGVbN4v_logf,
+	       __redirect__ZGVbN4v_logf)
+  __attribute__ ((visibility ("hidden")));
+#endif
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_logf8_core.S b/sysdeps/x86_64/fpu/multiarch/svml_s_logf8_core-sse.S
index f4b82de3d4..e5a46ef17a 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_s_logf8_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_logf8_core-sse.S
@@ -1,4 +1,4 @@
-/* Multiple versions of vectorized logf.
+/* SSE version of vectorized logf.
    Copyright (C) 2014-2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
@@ -16,21 +16,5 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
-#include <init-arch.h>
-
-	.text
-ENTRY (_ZGVdN8v_logf)
-        .type   _ZGVdN8v_logf, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVdN8v_logf_avx2(%rip), %rax
-	HAS_ARCH_FEATURE (AVX2_Usable)
-        jz      2f
-        ret
-2:      leaq    _ZGVdN8v_logf_sse_wrapper(%rip), %rax
-        ret
-END (_ZGVdN8v_logf)
-libmvec_hidden_def (_ZGVdN8v_logf)
-
 #define _ZGVdN8v_logf _ZGVdN8v_logf_sse_wrapper
 #include "../svml_s_logf8_core.S"
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_logf8_core.c b/sysdeps/x86_64/fpu/multiarch/svml_s_logf8_core.c
new file mode 100644
index 0000000000..b4efa7a24e
--- /dev/null
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_logf8_core.c
@@ -0,0 +1,28 @@
+/* Multiple versions of vectorized logf, vector length is 8.
+   Copyright (C) 2017 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#define SYMBOL_NAME _ZGVdN8v_logf
+#include "ifunc-mathvec-avx2.h"
+
+libc_ifunc_redirected (REDIRECT_NAME, SYMBOL_NAME, IFUNC_SELECTOR ());
+
+#ifdef SHARED
+__hidden_ver1 (_ZGVdN8v_logf, __GI__ZGVdN8v_logf,
+	       __redirect__ZGVdN8v_logf)
+  __attribute__ ((visibility ("hidden")));
+#endif
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_powf16_core.S b/sysdeps/x86_64/fpu/multiarch/svml_s_powf16_core-avx2.S
index 6d10c7576f..ec6ec70f53 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_s_powf16_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_powf16_core-avx2.S
@@ -1,4 +1,4 @@
-/* Multiple versions of vectorized powf.
+/* AVX2 version of vectorized powf.
    Copyright (C) 2014-2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
@@ -16,22 +16,5 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
-#include <init-arch.h>
-
-	.text
-ENTRY (_ZGVeN16vv_powf)
-        .type   _ZGVeN16vv_powf, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVeN16vv_powf_skx(%rip), %rax
-	HAS_ARCH_FEATURE (AVX512DQ_Usable)
-        jnz     2f
-        leaq    _ZGVeN16vv_powf_knl(%rip), %rax
-	HAS_ARCH_FEATURE (AVX512F_Usable)
-        jnz     2f
-        leaq    _ZGVeN16vv_powf_avx2_wrapper(%rip), %rax
-2:      ret
-END (_ZGVeN16vv_powf)
-
 #define _ZGVeN16vv_powf _ZGVeN16vv_powf_avx2_wrapper
 #include "../svml_s_powf16_core.S"
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_powf16_core.c b/sysdeps/x86_64/fpu/multiarch/svml_s_powf16_core.c
new file mode 100644
index 0000000000..25c706aa68
--- /dev/null
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_powf16_core.c
@@ -0,0 +1,28 @@
+/* Multiple versions of vectorized powf, vector length is 16.
+   Copyright (C) 2017 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#define SYMBOL_NAME _ZGVeN16vv_powf
+#include "ifunc-mathvec-avx512.h"
+
+libc_ifunc_redirected (REDIRECT_NAME, SYMBOL_NAME, IFUNC_SELECTOR ());
+
+#ifdef SHARED
+__hidden_ver1 (_ZGVeN16vv_powf, __GI__ZGVeN16vv_powf,
+	       __redirect__ZGVeN16vv_powf)
+  __attribute__ ((visibility ("hidden")));
+#endif
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_powf4_core.S b/sysdeps/x86_64/fpu/multiarch/svml_s_powf4_core-sse2.S
index 785b549882..30b77b665d 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_s_powf4_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_powf4_core-sse2.S
@@ -1,4 +1,4 @@
-/* Multiple versions of vectorized powf.
+/* SSE2 version of vectorized powf.
    Copyright (C) 2014-2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
@@ -16,21 +16,5 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
-#include <init-arch.h>
-
-	.text
-ENTRY (_ZGVbN4vv_powf)
-        .type   _ZGVbN4vv_powf, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVbN4vv_powf_sse4(%rip), %rax
-	HAS_CPU_FEATURE (SSE4_1)
-        jz      2f
-        ret
-2:      leaq    _ZGVbN4vv_powf_sse2(%rip), %rax
-        ret
-END (_ZGVbN4vv_powf)
-libmvec_hidden_def (_ZGVbN4vv_powf)
-
 #define _ZGVbN4vv_powf _ZGVbN4vv_powf_sse2
 #include "../svml_s_powf4_core.S"
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_powf4_core.c b/sysdeps/x86_64/fpu/multiarch/svml_s_powf4_core.c
new file mode 100644
index 0000000000..4d9821cfc8
--- /dev/null
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_powf4_core.c
@@ -0,0 +1,28 @@
+/* Multiple versions of vectorized powf, vector length is 4.
+   Copyright (C) 2017 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#define SYMBOL_NAME _ZGVbN4vv_powf
+#include "ifunc-mathvec-sse4_1.h"
+
+libc_ifunc_redirected (REDIRECT_NAME, SYMBOL_NAME, IFUNC_SELECTOR ());
+
+#ifdef SHARED
+__hidden_ver1 (_ZGVbN4vv_powf, __GI__ZGVbN4vv_powf,
+	       __redirect__ZGVbN4vv_powf)
+  __attribute__ ((visibility ("hidden")));
+#endif
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_powf8_core.S b/sysdeps/x86_64/fpu/multiarch/svml_s_powf8_core-sse.S
index 1f6a07315e..824042d36e 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_s_powf8_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_powf8_core-sse.S
@@ -1,4 +1,4 @@
-/* Multiple versions of vectorized powf.
+/* SSE version of vectorized powf.
    Copyright (C) 2014-2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
@@ -16,21 +16,5 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
-#include <init-arch.h>
-
-	.text
-ENTRY (_ZGVdN8vv_powf)
-        .type   _ZGVdN8vv_powf, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVdN8vv_powf_avx2(%rip), %rax
-	HAS_ARCH_FEATURE (AVX2_Usable)
-        jz      2f
-        ret
-2:      leaq    _ZGVdN8vv_powf_sse_wrapper(%rip), %rax
-        ret
-END (_ZGVdN8vv_powf)
-libmvec_hidden_def (_ZGVdN8vv_powf)
-
 #define _ZGVdN8vv_powf _ZGVdN8vv_powf_sse_wrapper
 #include "../svml_s_powf8_core.S"
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_powf8_core.c b/sysdeps/x86_64/fpu/multiarch/svml_s_powf8_core.c
new file mode 100644
index 0000000000..64ac764e19
--- /dev/null
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_powf8_core.c
@@ -0,0 +1,28 @@
+/* Multiple versions of vectorized sinf, vector length is 8.
+   Copyright (C) 2017 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#define SYMBOL_NAME _ZGVdN8vv_powf
+#include "ifunc-mathvec-avx2.h"
+
+libc_ifunc_redirected (REDIRECT_NAME, SYMBOL_NAME, IFUNC_SELECTOR ());
+
+#ifdef SHARED
+__hidden_ver1 (_ZGVdN8vv_powf, __GI__ZGVdN8vv_powf,
+	       __redirect__ZGVdN8vv_powf)
+  __attribute__ ((visibility ("hidden")));
+#endif
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_sincosf16_core.S b/sysdeps/x86_64/fpu/multiarch/svml_s_sincosf16_core-avx2.S
index 0545460952..a145d2f296 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_s_sincosf16_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_sincosf16_core-avx2.S
@@ -1,4 +1,4 @@
-/* Multiple versions of vectorized sincosf.
+/* AVX2 version of vectorized sincosf.
    Copyright (C) 2014-2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
@@ -16,22 +16,5 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
-#include <init-arch.h>
-
-	.text
-ENTRY (_ZGVeN16vvv_sincosf)
-        .type   _ZGVeN16vvv_sincosf, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVeN16vvv_sincosf_skx(%rip), %rax
-	HAS_ARCH_FEATURE (AVX512DQ_Usable)
-        jnz     2f
-        leaq    _ZGVeN16vvv_sincosf_knl(%rip), %rax
-	HAS_ARCH_FEATURE (AVX512F_Usable)
-        jnz     2f
-        leaq    _ZGVeN16vvv_sincosf_avx2_wrapper(%rip), %rax
-2:      ret
-END (_ZGVeN16vvv_sincosf)
-
 #define _ZGVeN16vvv_sincosf _ZGVeN16vvv_sincosf_avx2_wrapper
 #include "../svml_s_sincosf16_core.S"
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_sincosf16_core.c b/sysdeps/x86_64/fpu/multiarch/svml_s_sincosf16_core.c
new file mode 100644
index 0000000000..ac66a4e80b
--- /dev/null
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_sincosf16_core.c
@@ -0,0 +1,28 @@
+/* Multiple versions of vectorized sincosf, vector length is 16.
+   Copyright (C) 2017 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#define SYMBOL_NAME _ZGVeN16vvv_sincosf
+#include "ifunc-mathvec-avx512.h"
+
+libc_ifunc_redirected (REDIRECT_NAME, SYMBOL_NAME, IFUNC_SELECTOR ());
+
+#ifdef SHARED
+__hidden_ver1 (_ZGVeN16vvv_sincosf, __GI__ZGVeN16vvv_sincosf,
+	       __redirect__ZGVeN16vvv_sincosf)
+  __attribute__ ((visibility ("hidden")));
+#endif
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_sincosf4_core.S b/sysdeps/x86_64/fpu/multiarch/svml_s_sincosf4_core-sse2.S
index a249be33d1..dc25091fbc 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_s_sincosf4_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_sincosf4_core-sse2.S
@@ -1,4 +1,4 @@
-/* Multiple versions of vectorized sincosf.
+/* SSE2 version of vectorized sincosf.
    Copyright (C) 2014-2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
@@ -16,21 +16,5 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
-#include <init-arch.h>
-
-	.text
-ENTRY (_ZGVbN4vvv_sincosf)
-        .type   _ZGVbN4vvv_sincosf, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVbN4vvv_sincosf_sse4(%rip), %rax
-	HAS_CPU_FEATURE (SSE4_1)
-        jz      2f
-        ret
-2:      leaq    _ZGVbN4vvv_sincosf_sse2(%rip), %rax
-        ret
-END (_ZGVbN4vvv_sincosf)
-libmvec_hidden_def (_ZGVbN4vvv_sincosf)
-
 #define _ZGVbN4vvv_sincosf _ZGVbN4vvv_sincosf_sse2
 #include "../svml_s_sincosf4_core.S"
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_sincosf4_core.c b/sysdeps/x86_64/fpu/multiarch/svml_s_sincosf4_core.c
new file mode 100644
index 0000000000..fc81d43cbf
--- /dev/null
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_sincosf4_core.c
@@ -0,0 +1,28 @@
+/* Multiple versions of vectorized sincosf, vector length is 4.
+   Copyright (C) 2017 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#define SYMBOL_NAME _ZGVbN4vvv_sincosf
+#include "ifunc-mathvec-sse4_1.h"
+
+libc_ifunc_redirected (REDIRECT_NAME, SYMBOL_NAME, IFUNC_SELECTOR ());
+
+#ifdef SHARED
+__hidden_ver1 (_ZGVbN4vvv_sincosf, __GI__ZGVbN4vvv_sincosf,
+	       __redirect__ZGVbN4vvv_sincosf)
+  __attribute__ ((visibility ("hidden")));
+#endif
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_sincosf8_core.S b/sysdeps/x86_64/fpu/multiarch/svml_s_sincosf8_core-sse.S
index 320fd861a5..2541297373 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_s_sincosf8_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_sincosf8_core-sse.S
@@ -1,4 +1,4 @@
-/* Multiple versions of vectorized sincosf.
+/* SSE version of vectorized sincosf.
    Copyright (C) 2014-2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
@@ -16,21 +16,5 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
-#include <init-arch.h>
-
-	.text
-ENTRY (_ZGVdN8vvv_sincosf)
-        .type   _ZGVdN8vvv_sincosf, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVdN8vvv_sincosf_avx2(%rip), %rax
-	HAS_ARCH_FEATURE (AVX2_Usable)
-        jz      2f
-        ret
-2:      leaq    _ZGVdN8vvv_sincosf_sse_wrapper(%rip), %rax
-        ret
-END (_ZGVdN8vvv_sincosf)
-libmvec_hidden_def (_ZGVdN8vvv_sincosf)
-
 #define _ZGVdN8vvv_sincosf _ZGVdN8vvv_sincosf_sse_wrapper
 #include "../svml_s_sincosf8_core.S"
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_sincosf8_core.c b/sysdeps/x86_64/fpu/multiarch/svml_s_sincosf8_core.c
new file mode 100644
index 0000000000..cd57ff3aa9
--- /dev/null
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_sincosf8_core.c
@@ -0,0 +1,28 @@
+/* Multiple versions of vectorized sincosf, vector length is 8.
+   Copyright (C) 2017 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#define SYMBOL_NAME _ZGVdN8vvv_sincosf
+#include "ifunc-mathvec-avx2.h"
+
+libc_ifunc_redirected (REDIRECT_NAME, SYMBOL_NAME, IFUNC_SELECTOR ());
+
+#ifdef SHARED
+__hidden_ver1 (_ZGVdN8vvv_sincosf, __GI__ZGVdN8vvv_sincosf,
+	       __redirect__ZGVdN8vvv_sincosf)
+  __attribute__ ((visibility ("hidden")));
+#endif
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_sinf16_core.S b/sysdeps/x86_64/fpu/multiarch/svml_s_sinf16_core-avx2.S
index 2c18dbce53..f7d0c3f2ff 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_s_sinf16_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_sinf16_core-avx2.S
@@ -1,4 +1,4 @@
-/* Multiple versions of vectorized sinf.
+/* AVX2 version of vectorized sinf.
    Copyright (C) 2014-2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
@@ -16,22 +16,5 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
-#include <init-arch.h>
-
-	.text
-ENTRY (_ZGVeN16v_sinf)
-        .type   _ZGVeN16v_sinf, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVeN16v_sinf_skx(%rip), %rax
-	HAS_ARCH_FEATURE (AVX512DQ_Usable)
-        jnz     2f
-        leaq    _ZGVeN16v_sinf_knl(%rip), %rax
-	HAS_ARCH_FEATURE (AVX512F_Usable)
-        jnz     2f
-        leaq    _ZGVeN16v_sinf_avx2_wrapper(%rip), %rax
-2:      ret
-END (_ZGVeN16v_sinf)
-
 #define _ZGVeN16v_sinf _ZGVeN16v_sinf_avx2_wrapper
 #include "../svml_s_sinf16_core.S"
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_sinf16_core.c b/sysdeps/x86_64/fpu/multiarch/svml_s_sinf16_core.c
new file mode 100644
index 0000000000..d2e15f0eaf
--- /dev/null
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_sinf16_core.c
@@ -0,0 +1,28 @@
+/* Multiple versions of vectorized sinf, vector length is 16.
+   Copyright (C) 2017 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#define SYMBOL_NAME _ZGVeN16v_sinf
+#include "ifunc-mathvec-avx512.h"
+
+libc_ifunc_redirected (REDIRECT_NAME, SYMBOL_NAME, IFUNC_SELECTOR ());
+
+#ifdef SHARED
+__hidden_ver1 (_ZGVeN16v_sinf, __GI__ZGVeN16v_sinf,
+	       __redirect__ZGVeN16v_sinf)
+  __attribute__ ((visibility ("hidden")));
+#endif
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_sinf4_core.S b/sysdeps/x86_64/fpu/multiarch/svml_s_sinf4_core-sse2.S
index 3556473899..a9de674202 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_s_sinf4_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_sinf4_core-sse2.S
@@ -1,4 +1,4 @@
-/* Multiple versions of vectorized sinf.
+/* SSE2 version of vectorized sinf.
    Copyright (C) 2014-2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
@@ -16,21 +16,5 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
-#include <init-arch.h>
-
-	.text
-ENTRY (_ZGVbN4v_sinf)
-        .type   _ZGVbN4v_sinf, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVbN4v_sinf_sse4(%rip), %rax
-	HAS_CPU_FEATURE (SSE4_1)
-        jz      2f
-        ret
-2:      leaq    _ZGVbN4v_sinf_sse2(%rip), %rax
-        ret
-END (_ZGVbN4v_sinf)
-libmvec_hidden_def (_ZGVbN4v_sinf)
-
 #define _ZGVbN4v_sinf _ZGVbN4v_sinf_sse2
 #include "../svml_s_sinf4_core.S"
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_sinf4_core.c b/sysdeps/x86_64/fpu/multiarch/svml_s_sinf4_core.c
new file mode 100644
index 0000000000..466b798705
--- /dev/null
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_sinf4_core.c
@@ -0,0 +1,28 @@
+/* Multiple versions of vectorized sinf, vector length is 4.
+   Copyright (C) 2017 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#define SYMBOL_NAME _ZGVbN4v_sinf
+#include "ifunc-mathvec-sse4_1.h"
+
+libc_ifunc_redirected (REDIRECT_NAME, SYMBOL_NAME, IFUNC_SELECTOR ());
+
+#ifdef SHARED
+__hidden_ver1 (_ZGVbN4v_sinf, __GI__ZGVbN4v_sinf,
+	       __redirect__ZGVbN4v_sinf)
+  __attribute__ ((visibility ("hidden")));
+#endif
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_sinf8_core.S b/sysdeps/x86_64/fpu/multiarch/svml_s_sinf8_core-sse.S
index 674e88bd55..fbf6bd20ff 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_s_sinf8_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_sinf8_core-sse.S
@@ -1,4 +1,4 @@
-/* Multiple versions of vectorized sinf, vector length is 8.
+/* SSE version of vectorized sinf, vector length is 8.
    Copyright (C) 2014-2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
@@ -16,21 +16,5 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
-#include <init-arch.h>
-
-	.text
-ENTRY (_ZGVdN8v_sinf)
-        .type   _ZGVdN8v_sinf, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-1:      leaq    _ZGVdN8v_sinf_avx2(%rip), %rax
-	HAS_ARCH_FEATURE (AVX2_Usable)
-        jz      2f
-        ret
-2:      leaq    _ZGVdN8v_sinf_sse_wrapper(%rip), %rax
-        ret
-END (_ZGVdN8v_sinf)
-libmvec_hidden_def (_ZGVdN8v_sinf)
-
 #define _ZGVdN8v_sinf _ZGVdN8v_sinf_sse_wrapper
 #include "../svml_s_sinf8_core.S"
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_sinf8_core.c b/sysdeps/x86_64/fpu/multiarch/svml_s_sinf8_core.c
new file mode 100644
index 0000000000..cb5c99289a
--- /dev/null
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_sinf8_core.c
@@ -0,0 +1,28 @@
+/* Multiple versions of vectorized sinf, vector length is 8.
+   Copyright (C) 2017 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#define SYMBOL_NAME _ZGVdN8v_sinf
+#include "ifunc-mathvec-avx2.h"
+
+libc_ifunc_redirected (REDIRECT_NAME, SYMBOL_NAME, IFUNC_SELECTOR ());
+
+#ifdef SHARED
+__hidden_ver1 (_ZGVdN8v_sinf, __GI__ZGVdN8v_sinf,
+	       __redirect__ZGVdN8v_sinf)
+  __attribute__ ((visibility ("hidden")));
+#endif