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| author | H.J. Lu <hjl.tools@gmail.com> | 2016-04-15 05:22:53 -0700 |
|---|---|---|
| committer | H.J. Lu <hjl.tools@gmail.com> | 2016-04-15 05:23:06 -0700 |
| commit | 2e2d9796daba2776e661c5a9e570370b6bcb5aec (patch) | |
| tree | e494c90981346fc1008a34f76a0743e6289eae20 | |
| parent | 155bc2a502b8a455952dec4c7ae72b64eb41d8d1 (diff) | |
| download | glibc-2e2d9796daba2776e661c5a9e570370b6bcb5aec.tar.gz | |
Detect Intel Goldmont and Airmont processors
Updated from the model numbers of Goldmont and Airmont processors in
Intel64 And IA-32 Processor Architectures Software Developer's Manual
Volume 3 Revision 058.
* sysdeps/x86/cpu-features.c (init_cpu_features): Detect Intel
Goldmont and Airmont processors.
| -rw-r--r-- | ChangeLog | 5 | ||||
| -rw-r--r-- | sysdeps/x86/cpu-features.c | 8 |
2 files changed, 13 insertions, 0 deletions
@@ -1,3 +1,8 @@ +2016-04-15 H.J. Lu <hongjiu.lu@intel.com> + + * sysdeps/x86/cpu-features.c (init_cpu_features): Detect Intel + Goldmont and Airmont processors. + 2016-04-15 Wilco Dijkstra <wdijkstr@arm.com> * string/string.h: Use __GNUC_PREREQ(3,4) for bits/string2.h. diff --git a/sysdeps/x86/cpu-features.c b/sysdeps/x86/cpu-features.c index 963b845916..a5fa81f709 100644 --- a/sysdeps/x86/cpu-features.c +++ b/sysdeps/x86/cpu-features.c @@ -140,6 +140,14 @@ init_cpu_features (struct cpu_features *cpu_features) cpu_features->feature[index_arch_Prefer_No_VZEROUPPER] |= bit_arch_Prefer_No_VZEROUPPER; + case 0x5c: + case 0x5f: + /* Unaligned load versions are faster than SSSE3 + on Goldmont. */ + + case 0x4c: + /* Airmont is a die shrink of Silvermont. */ + case 0x37: case 0x4a: case 0x4d: |