diff options
| author | H.J. Lu <hjl.tools@gmail.com> | 2018-08-06 06:25:28 -0700 |
|---|---|---|
| committer | H.J. Lu <hjl.tools@gmail.com> | 2018-08-06 06:25:43 -0700 |
| commit | fb4c32aef64500c65c7fc95ca06d7e17d467be45 (patch) | |
| tree | eef59c6f48555419272cc88b68fbce8d42d6a001 | |
| parent | e5721f45f6377c27ccb2572001dc98f7a2e6a146 (diff) | |
| download | glibc-fb4c32aef64500c65c7fc95ca06d7e17d467be45.tar.gz | |
x86: Move STATE_SAVE_OFFSET/STATE_SAVE_MASK to sysdep.h
Move STATE_SAVE_OFFSET and STATE_SAVE_MASK to sysdep.h to make
sysdeps/x86/cpu-features.h a C header file.
* sysdeps/x86/cpu-features.h (STATE_SAVE_OFFSET): Removed.
(STATE_SAVE_MASK): Likewise.
Don't check __ASSEMBLER__ to include <cpu-features-offsets.h>.
* sysdeps/x86/sysdep.h (STATE_SAVE_OFFSET): New.
(STATE_SAVE_MASK): Likewise.
* sysdeps/x86_64/dl-trampoline.S: Include <cpu-features-offsets.h>
instead of <cpu-features.h>.
| -rw-r--r-- | ChangeLog | 10 | ||||
| -rw-r--r-- | sysdeps/x86/cpu-features.h | 14 | ||||
| -rw-r--r-- | sysdeps/x86/sysdep.h | 9 | ||||
| -rw-r--r-- | sysdeps/x86_64/dl-trampoline.S | 2 |
4 files changed, 20 insertions, 15 deletions
@@ -1,3 +1,13 @@ +2018-08-06 H.J. Lu <hongjiu.lu@intel.com> + + * sysdeps/x86/cpu-features.h (STATE_SAVE_OFFSET): Removed. + (STATE_SAVE_MASK): Likewise. + Don't check __ASSEMBLER__ to include <cpu-features-offsets.h>. + * sysdeps/x86/sysdep.h (STATE_SAVE_OFFSET): New. + (STATE_SAVE_MASK): Likewise. + * sysdeps/x86_64/dl-trampoline.S: Include <cpu-features-offsets.h> + instead of <cpu-features.h>. + 2018-08-03 DJ Delorie <dj@redhat.com> * sysdeps/riscv/rvf/math_private.h (libc_feholdexcept_setround_riscv): diff --git a/sysdeps/x86/cpu-features.h b/sysdeps/x86/cpu-features.h index 4c6d08c709..d342664c64 100644 --- a/sysdeps/x86/cpu-features.h +++ b/sysdeps/x86/cpu-features.h @@ -92,18 +92,6 @@ /* The current maximum size of the feature integer bit array. */ #define FEATURE_INDEX_MAX 1 -/* Offset for fxsave/xsave area used by _dl_runtime_resolve. Also need - space to preserve RCX, RDX, RSI, RDI, R8, R9 and RAX. It must be - aligned to 16 bytes for fxsave and 64 bytes for xsave. */ -#define STATE_SAVE_OFFSET (8 * 7 + 8) - -/* Save SSE, AVX, AVX512, mask and bound registers. */ -#define STATE_SAVE_MASK \ - ((1 << 1) | (1 << 2) | (1 << 3) | (1 << 5) | (1 << 6) | (1 << 7)) - -#ifdef __ASSEMBLER__ -# include <cpu-features-offsets.h> -#else /* __ASSEMBLER__ */ enum { COMMON_CPUID_INDEX_1 = 0, @@ -267,8 +255,6 @@ extern const struct cpu_features *__get_cpu_features (void) # define index_arch_XSAVEC_Usable FEATURE_INDEX_1 # define index_arch_Prefer_FSRM FEATURE_INDEX_1 -#endif /* !__ASSEMBLER__ */ - #ifdef __x86_64__ # define HAS_CPUID 1 #elif defined __i586__ || defined __pentium__ diff --git a/sysdeps/x86/sysdep.h b/sysdeps/x86/sysdep.h index 8776ad8374..f41f4ebd42 100644 --- a/sysdeps/x86/sysdep.h +++ b/sysdeps/x86/sysdep.h @@ -48,6 +48,15 @@ enum cf_protection_level # define SHSTK_ENABLED 0 #endif +/* Offset for fxsave/xsave area used by _dl_runtime_resolve. Also need + space to preserve RCX, RDX, RSI, RDI, R8, R9 and RAX. It must be + aligned to 16 bytes for fxsave and 64 bytes for xsave. */ +#define STATE_SAVE_OFFSET (8 * 7 + 8) + +/* Save SSE, AVX, AVX512, mask and bound registers. */ +#define STATE_SAVE_MASK \ + ((1 << 1) | (1 << 2) | (1 << 3) | (1 << 5) | (1 << 6) | (1 << 7)) + #ifdef __ASSEMBLER__ /* Syntactic details of assembler. */ diff --git a/sysdeps/x86_64/dl-trampoline.S b/sysdeps/x86_64/dl-trampoline.S index ef1425cbb9..fd918510fe 100644 --- a/sysdeps/x86_64/dl-trampoline.S +++ b/sysdeps/x86_64/dl-trampoline.S @@ -18,7 +18,7 @@ #include <config.h> #include <sysdep.h> -#include <cpu-features.h> +#include <cpu-features-offsets.h> #include <link-defines.h> #ifndef DL_STACK_ALIGNMENT |