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* libgcc/bergner2017-07-071-41/+1
* Add support for ARMv8-R architecturethopre012017-07-061-1/+1
* 2017-06-27 Olivier Hainque <hainque@adacore.com>hainque2017-07-031-0/+16
* Use ucontext_t not struct ucontext in linux-unwind.h files.jsm282017-06-2811-12/+12
* gcc/uros2017-06-221-0/+3
* [arm] Explicitly set .fpu in cmse_nonsecure_call.Srearnsha2017-06-161-0/+8
* 2017-06-08 Olivier Hainque <hainque@adacore.com>hainque2017-06-081-3/+3
* Fix white space.dje2017-06-071-4/+4
* 2017-06-07 Tony Reix <tony.reix@atos.net>dje2017-06-071-9/+28
* 2017-06-02 Olivier Hainque <hainque@adacore.com>hainque2017-06-021-1/+1
* 2017-05-30 Olivier Hainque <hainque@adacore.com>hainque2017-05-301-1/+1
* PR libgcc/80037rth2017-05-261-0/+4
* 2017-05-17 Andreas Tobler <andreast@gcc.gnu.org>andreast2017-05-172-0/+29
* * config/sparc/lb1spc.S [__ELF__ && __linux__]: Emit .note.GNU-stackebotcazou2017-05-151-0/+6
* gcc/ChangeLog:uros2017-05-148-0/+429
* Add fuchsia support to libgccjconner2017-05-062-1/+45
* * Makefile.in: Swap definition of LIBGCC_LINKS and inclusion oflaw2017-04-071-1/+1
* [RS6000] Out-of-line register save functions can't be used from crtend.oamodra2017-04-071-1/+4
* Fix numerous typos in commentsredi2017-04-031-1/+1
* [ARC] Fix divdf3 emulation for arcem.claziss2017-03-271-4/+4
* 2017-03-10 John Marino <gnugcc@marino.st>andreast2017-03-101-0/+108
* Build crt*vr.S with AltiVec enabledsegher2017-03-102-0/+2
* * config/i386/gthr-win32.h: Define NOGDI beforejyong2017-03-021-0/+1
* * config/aarch64/value-unwind.h: New file.sje2017-02-161-0/+25
* RISC-V Port: libgccpalmer2017-02-0614-0/+1112
* * config/i386/cygming-crtbegin.c (LIBGCJ_SONAME): No longer #define.gerald2017-01-211-4/+0
* [AArch64] Only build & test pauth code for LP64jiwang2017-01-201-2/+2
* [AArch64] Always include linux-unwind.hjiwang2017-01-201-1/+3
* [AArch64, libgcc] Add missing file, forget "svn add"jiwang2017-01-201-0/+87
* [AArch64][4/4] libgcc unwinder support for return address signingjiwang2017-01-201-0/+1
* libgcc/dj2017-01-181-2/+4
* 2017-01-13 Joe Seymour <joe.s@somniumtech.com>dj2017-01-131-4/+4
* * gcc.target/i386/builtin_target.c (check_features): Check alluros2017-01-121-6/+6
* Enable AVX-512 VPOPCNTD/VPOPCNTQ instructions.kyukhin2017-01-102-1/+4
* Make MIPS soft-fp preserve NaN payloads for NAN2008.jsm282017-01-041-1/+13
* Update copyright years.jakub2017-01-01922-922/+922
* [ARC] Rework code for profiling.claziss2016-12-1616-1520/+0
* libgcc/gjl2016-12-121-1/+1
* libgcc/gjl2016-12-121-11/+18
* [ARC] Fix PIE.claziss2016-12-051-0/+2
* 2016-12-03 Thomas Koenig <tkoenig@gcc.gnu.org>tkoenig2016-12-032-90/+118
* ARMv8-M Security Extension's cmse_nonsecure_call: use __gnu_cmse_nonsecure_callavieira2016-12-022-0/+133
* Add support for ARMv8-M's Secure Extensions flag and intrinsicsavieira2016-12-022-0/+120
* PR gcc/74748law2016-11-282-1893/+4
* [Darwin] fix PR67710 by updating 'as' specs to handle newer assembler versions.iains2016-11-271-0/+4
* [Patch libgcc AArch64 12/17] Enable hfmode soft-float conversions and truncat...jgreenhalgh2016-11-242-2/+5
* [Patch 15/17 libgcc ARM] Add double to half conversions.jgreenhalgh2016-11-231-0/+27
* [Patch 14/17] [libgcc, ARM] Generalise float-to-half conversion function.jgreenhalgh2016-11-231-18/+72
* Add avx5124vnniw/avx5124fmaps to target attributeshjl2016-11-171-1/+7
* [ARC][libgcc] Add support for QuarkSE processor.claziss2016-11-173-66/+74
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