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* PR target/52330uros2012-02-221-0/+7
| | | | | | | | | | | | | | * config/i386/i386.c (ix86_print_operand) <case 'H'>: Error out if x is not offsettable memory reference. testsuite/ChangeLog: PR target/52330 * gcc.target/i386/pr52330.c: New test. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@184488 138bc75d-0d04-0410-961f-82ee72b054a4
* PR middle-end/51782gjl2012-02-211-0/+51
| | | | | | | | * gcc.target/avr/torture/pr51782-1.c: New test. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@184434 138bc75d-0d04-0410-961f-82ee72b054a4
* [gcc]meissner2012-02-151-0/+24
| | | | | | | | | | | | | | | | | | | 2012-02-15 Michael Meissner <meissner@linux.vnet.ibm.com> PR target/52199 * config/rs6000/rs6000.c (rs6000_expand_vector_init): Use force_reg instead of copy_to_reg for better optimization. Force non-register or memory operands into a register. [gcc/testsuite] 2012-02-15 Michael Meissner <meissner@linux.vnet.ibm.com> PR target/52199 * gcc.target/powerpc/pr52199.c: New file. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@184287 138bc75d-0d04-0410-961f-82ee72b054a4
* gcc/testsuite/gjl2012-02-152-0/+191
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * gcc.target/avr/torture/builtin_insert_bits-1.c: New test. * gcc.target/avr/torture/builtin_insert_bits-2.c: New test. gcc/ * doc/extend.texi (AVR Built-in Functions): Remove doc for __builtin_avr_map8, __builtin_avr_map16. Document __builtin_avr_insert_bits. * config/avr/avr.md (map_bitsqi, map_bitshi): Remove. (insert_bits): New insn. (adjust_len.map_bits): Rename to insert_bits. (UNSPEC_MAP_BITS): Rename to UNSPEC_INSERT_BITS. * avr-protos.h (avr_out_map_bits): Remove. (avr_out_insert_bits, avr_has_nibble_0xf): New. * config/avr/constraints.md (Cxf,C0f): New. * config/avr/avr.c (avr_cpu_cpp_builtins): Remove built-in defines __BUILTIN_AVR_MAP8, __BUILTIN_AVR_MAP16. New built-in define __BUILTIN_AVR_INSERT_BITS. * config/avr/avr.c (TARGET_FOLD_BUILTIN): New define. (enum avr_builtin_id): Add AVR_BUILTIN_INSERT_BITS. (avr_move_bits): Rewrite. (avr_fold_builtin, avr_map_metric, avr_map_decompose): New static functions. (avr_map_op_t): New typedef. (avr_map_op): New static variable. (avr_out_insert_bits, avr_has_nibble_0xf): New functions. (adjust_insn_length): Handle ADJUST_LEN_INSERT_BITS. (avr_init_builtins): Add definition for __builtin_avr_insert_bits. (bdesc_3arg, avr_expand_triop_builtin): New. (avr_expand_builtin): Use them. And handle AVR_BUILTIN_INSERT_BITS. (avr_revert_map, avr_swap_map, avr_id_map, avr_sig_map): Remove. (avr_map_hamming_byte, avr_map_hamming_nonstrict): Remove. (avr_map_equal_p, avr_map_sig_p): Remove. (avr_out_swap_bits, avr_out_revert_bits, avr_out_map_bits): Remove. (bdesc_2arg): Remove AVR_BUILTIN_MAP8, AVR_BUILTIN_MAP16. (adjust_insn_length): Remove handling for ADJUST_LEN_MAP_BITS. (enum avr_builtin_id): Remove AVR_BUILTIN_MAP8, AVR_BUILTIN_MAP16. (avr_init_builtins): Remove __builtin_avr_map8, __builtin_avr_map16. (avr_expand_builtin): Remove AVR_BUILTIN_MAP8, AVR_BUILTIN_MAP16. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@184264 138bc75d-0d04-0410-961f-82ee72b054a4
* Add the testcase for PR 52146hjl2012-02-101-0/+18
| | | | git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@184113 138bc75d-0d04-0410-961f-82ee72b054a4
* * gcc.target/epiphany/interrupt-2.c: New test.amylaar2012-02-071-0/+24
| | | | git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@183982 138bc75d-0d04-0410-961f-82ee72b054a4
* gcc/testsuite/rsandifo2012-02-072-0/+11
| | | | | | | | | | PR target/52155 * gcc.target/mips/mips.exp (mips-dg-options): Handle xfail and target. * gcc.target/mips/loongson-shift-count-truncated-1.c: Force -mlong64 for MIPS ELF. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@183979 138bc75d-0d04-0410-961f-82ee72b054a4
* gcc/rsandifo2012-02-071-0/+48
| | | | | | | | | | | | | | | | PR middle-end/24306 * config/mips/mips.c (mips_std_gimplify_va_arg_expr): New function. (mips_gimplify_va_arg_expr): Call it instead of std_gimplify_va_arg_expr. gcc/testsuite/ PR middle-end/24306 PR target/52154 * lib/target-supports.exp (check_effective_target_mips_eabi): New. * gcc.target/mips/va-arg-1.c: New test. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@183977 138bc75d-0d04-0410-961f-82ee72b054a4
* [gcc]meissner2012-02-071-1/+1
| | | | | | | | | | | | | | | | | | 2012-02-07 Michael Meissner <meissner@linux.vnet.ibm.com> * config/rs6000/rs6000.c (rs6000_trampoline_init): Fix error message for -mno-pointers-to-nested-function. [gcc/testsuite] 2012-02-07 Michael Meissner <meissner@linux.vnet.ibm.com> * gcc.target/powerpc/no-r11-3.c (outer_func): Fix error message for -mno-pointers-to-nested-functions. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@183976 138bc75d-0d04-0410-961f-82ee72b054a4
* gcc/testsuite/rsandifo2012-02-051-1/+1
| | | | | | | | | | * lib/target-supports.exp (check_effective_target_mips_llsc): New. (check_effective_target_sync_int_long): Use it. (check_effective_target_sync_char_short): Likewise. * gcc.target/mips/atomic-memory-1.c: Restrict error check to mips_llsc. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@183909 138bc75d-0d04-0410-961f-82ee72b054a4
* gcc/rsandifo2012-02-021-0/+8
| | | | | | | | | | | | | 2012-02-02 Jia Liu <proljc@gmail.com> * config/mips/mips-dspr2.md (mips_prepend): Mask operand 3 rather than operand 2. gcc/testsuite/ * gcc.target/mips/mips-prepend-1.c: New test. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@183841 138bc75d-0d04-0410-961f-82ee72b054a4
* PR rtl-optimization/51374gjl2012-02-011-0/+1
| | | | | | | | | * gcc.target/avr/torture/pr51374-1.c: Also fail if SBIS is seen. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@183798 138bc75d-0d04-0410-961f-82ee72b054a4
* gcc/gjl2012-02-011-0/+14
| | | | | | | | | | | | | | PR rtl-optimization/51374 * combine.c (can_combine_p): Don't allow volatile_refs_p insns to cross other volatile_refs_p insns. gcc/testsuite/ PR rtl-optimization/51374 * testsuite/gcc.target/avr/torture/pr51374-1.c: New. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@183796 138bc75d-0d04-0410-961f-82ee72b054a4
* gcc/testsuite/rsandifo2012-01-307-14/+31
| | | | | | | | | | | | | | | * gcc.target/mips/extend-1.c (TEST_CHAR): Use signed char. (TEST_SHORT): Reformat in the same way. * gcc.target/mips/octeon-exts-6.c (TEST_CHAR): Use signed char. (TEST_SHORT): Reformat in the same way. * gcc.target/mips/octeon2-lx-1.c (TEST): Make sign explicit. * gcc.target/mips/pr37362.c: Skip for mips-sde-elf. * gcc.target/mips/mmcount-ra-address-1.c (bazl): Add NOMIPS16. * gcc.target/mips/mmcount-ra-address-2.c (bar): Likewise. * gcc.target/mips/mmcount-ra-address-3.c (bar): Likewise. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@183737 138bc75d-0d04-0410-961f-82ee72b054a4
* 2012-01-30 Bin Cheng <bin.cheng@arm.com>jye22012-01-301-0/+14
| | | | | | | | | | | | | | PR target/51835 * config/arm/arm.c (arm_libcall_uses_aapcs_base): Use correct ABI for __aeabi_d2iz/__aeabi_d2uiz with hard-float. testcases: PR target/51835 * gcc.target/arm/pr51835.c: New testcase. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@183733 138bc75d-0d04-0410-961f-82ee72b054a4
* For Greta Yorshramana2012-01-301-2/+2
| | | | | | | | | | | 2012-01-30 Greta Yorsh <Greta.Yorsh@arm.com> * gcc.target/arm/di-longlong64-sync-withldrexd.c: Accept new code generated for __sync_lock_release. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@183718 138bc75d-0d04-0410-961f-82ee72b054a4
* PR target/52006jakub2012-01-281-0/+19
| | | | | | | | | | | * config/arm/arm.md (pic_add_dot_plus_eight peephole2): Use arm_general_register_operand predicate for operand 2 instead of register_operand. * gcc.target/arm/pr52006.c: New test. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@183661 138bc75d-0d04-0410-961f-82ee72b054a4
* * gcc.target/avr/torture/int24-mul.c: Rename __pgm to __flash.gjl2012-01-251-1/+1
| | | | git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@183535 138bc75d-0d04-0410-961f-82ee72b054a4
* PR tree-optimization/51987jakub2012-01-251-0/+33
| | | | | | | | | | * tree-data-ref.c (get_references_in_stmt): Handle references in non-volatile GIMPLE_ASM. * gcc.target/i386/pr51987.c: New test. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@183524 138bc75d-0d04-0410-961f-82ee72b054a4
* PR target/51968rth2012-01-241-0/+32
| | | | | | | * config/arm/arm.c (neon_split_vcombine): Emit deleted note to effect no-op split. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@183480 138bc75d-0d04-0410-961f-82ee72b054a4
* PR target/51915jakub2012-01-201-0/+13
| | | | | | | | | | * config/arm/arm.c (arm_count_output_move_double_insns): Call output_move_double on a copy of operands array. * gcc.target/arm/pr51915.c: New test. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@183349 138bc75d-0d04-0410-961f-82ee72b054a4
* gcc/rsandifo2012-01-151-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 2012-01-08 Chung-Lin Tang <cltang@codesourcery.com> Richard Sandiford <rdsandiford@googlemail.com> * config/mips/mips-protos.h (SYMBOL_FORCE_TO_MEM): Delete. (SYMBOL_32_HIGH): Likewise. (mips_output_tls_reloc_directive): Declare. * config/mips/mips.h (PIC_FUNCTION_ADDR_REGNUM): Move to mips.md. (mips_use_pcrel_pool_p, mips_lo_relocs, mips_hi_relocs): Declare. * config/mips/mips.c (mips_use_pcrel_pool_p): New variable. (mips_lo_relocs, mips_hi_relocs): Make extern. (mips16_stub_function): Move up file. (mips_classify_symbol): Remove SYMBOL_FORCE_TO_MEM handling. (mips_symbolic_constant_p): Likewise. Remove SYMBOL_32_HIGH too. (mips_symbol_insns_1): Likewise. Check mips_use_pcrel_pool_p. (mips_cannot_force_const_mem): Use mips_use_pcrel_pool_p instead of SYMBOL_FORCE_TO_MEM. Only check mips_tls_symbol_ref_1 if it's false. (mips_get_tp): Add MIPS16 support. (mips_legitimize_tls_address): Remove MIPS16 sorry(). Generalize DTPREL and TPREL handling. (mips_init_relocs): Initialize mips_use_pcrel_pool_p. Add MIPS16 TLS support. (mips_output_tls_reloc_directive): New function. (mips16_rewrite_pool_refs): Ignore UNSPEC_TLS_GET_TPs. * config/mips/predicates.md (symbolic_operand_with_high) (tls_reloc_operand): New predicates. (force_to_mem_operand): Use mips_use_pcrel_pool_p. * config/mips/mips.md (UNSPEC_UNSHIFTED_HIGH): New unspec. (PIC_FUNCTION_ADDR_REGNUM): Moved from mips.h. (*unshifted_high): New instruction. Use it for MIPS16 high splitter. (consttable_tls_reloc, tls_get_tp_mips16_<mode>): New patterns. (*tls_get_tp_mips16_call_<mode>): Likewise. gcc/testsuite/ * gcc.target/mips/code-readable-2.c: Allow the jump table address to be loaded from the constant pool, rather than via %hi and %lo. libgcc/ 2012-01-08 Chung-Lin Tang <cltang@codesourcery.com> Richard Sandiford <rdsandiford@googlemail.com> * config/mips/libgcc-mips16.ver (__mips16_rdhwr): Add. * config/mips/mips16.S (__mips16_rdhwr): New function. * config/mips/t-mips16 (LIB1ASMFUNCS): Add _m16rdhwr. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@183195 138bc75d-0d04-0410-961f-82ee72b054a4
* 2012-01-06 Andrew Stubbs <ams@codesourcery.com>ams2012-01-061-1/+1
| | | | | | | | * gcc.target/arm/headmerge-2.c: Adjust scan pattern. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@182950 138bc75d-0d04-0410-961f-82ee72b054a4
* 2012-01-04 Andrew Pinski <apinski@cavium.com>pinskia2012-01-045-0/+68
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adam Nemet <anemet@caviumnetworks.com> * config/mips/mips.md (size): Add SI and DI. (SIZE): New mode attribute. (U): New code attribute. * config/mips/mips-dsp.md (mips_lbux): Use gen_mips_lbux_extsi. (mips_lbux_<mode>): Delete. (mips_l<SHORT:size><u>x_ext<GPR:mode>_<P:mode>): New pattern. (mips_lhx): Use gen_mips_lhx_extsi. (mips_lhx_<mode>): Delete. (mips_lwx): Delete. (mips_l<size>x): New expand. (mips_lwx_<mode>): Delete. (mips_l<GPR:size>x_<P:mode>): New pattern. (*mips_lw<u>x_<P:mode>_ext): Likewise. * config/mips/mips-ftypes.def: Add DI f(POINTER, SI) function type. * config/mips/mips.c (mips_lx_address_p): New function. (mips_rtx_costs <case MEM>): Call mips_lx_address_p. (dsp64): New availability predicate. (mips_builtins): Add an entry for __builtin_mips_ldx. * config/mips/mips.h (ISA_HAS_LBX): New define. (ISA_HAS_LBUX): Likewise. (ISA_HAS_LHX): Likewise. (ISA_HAS_LHUX): Likewise. (ISA_HAS_LWX): Likewise. (ISA_HAS_LWUX): Likewise. (ISA_HAS_LDX): Likewise. * doc/extend.texi (__builtin_mips_ldx): Document. 2012-01-04 Andrew Pinski <apinski@cavium.com> * gcc.target/mips/mips64-dsp-ldx1.c: New test. * gcc.target/mips/octeon2-lx-1.c: New test. * gcc.target/mips/mips64-dsp-ldx.c: New test. * gcc.target/mips/octeon2-lx-2.c: New test. * gcc.target/mips/octeon2-lx-3.c: New test. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@182884 138bc75d-0d04-0410-961f-82ee72b054a4
* gcc/testsuite/rsandifo2012-01-022-6/+8
| | | | | | | | | | PR target/51729 * gcc.target/mips/dspr2-MULT.c: Remove -ffixed-hi -ffixed-lo. XFAIL. * gcc.target/mips/dspr2-MULTU.c: Likewise. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@182793 138bc75d-0d04-0410-961f-82ee72b054a4
* Fix 50988 testsuite failuresmeissner2011-12-293-4/+8
| | | | git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@182728 138bc75d-0d04-0410-961f-82ee72b054a4
* Fix PR 51623meissner2011-12-281-0/+123
| | | | git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@182710 138bc75d-0d04-0410-961f-82ee72b054a4
* 2011-12-23 Dmitry Plotnikov <dplotnikov@ispras.ru>amonakov2011-12-232-0/+56
| | | | | | | | | | | | | | | | | | | | | | | | | * config/arm/neon.md (float<mode><V_cvtto>2): New. (floatuns<mode><V_cvtto>2): New. (fix_trunc<mode><V_cvtto>2): New. (fix_truncuns<mode><V_cvtto>2): New. * config/arm/iterators.md (V_cvtto): New iterator. gcc/testsuite/: * gcc.target/arm/vect-vcvt.c: New test. * gcc.target/arm/vect-vcvtq.c: New test. * gcc.dg/vect/fast-math-pr35982.c: Added vect_strided2 alternative in final check. * lib/target-supports.exp (check_effective_target_vect_intfloat_cvt): True for ARM NEON. (check_effective_target_vect_uintfloat_cvt): Likewise. (check_effective_target_vect_floatuint_cvt): Likewise. (check_effective_target_vect_floatint_cvt): Likewise. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@182657 138bc75d-0d04-0410-961f-82ee72b054a4
* PR target/51643rearnsha2011-12-221-0/+12
| | | | | | | | | | * arm.c (arm_function_ok_for_sibcall): Don't try to tailcall a weak function on bare-metal EABI targets. * gcc.target/arm/sibcall-2.c: New test. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@182621 138bc75d-0d04-0410-961f-82ee72b054a4
* * config/i386/i386.c (ix86_option_override_internal): Enable flag_reeuros2011-12-211-0/+20
| | | | | | | | | | | | | also for 32bit targets. testsuite/ChangeLog: * gcc.dg/pr50038.c: Move to ... * gcc.target/i386/pr50038.c: ... here. Test on all targets. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@182605 138bc75d-0d04-0410-961f-82ee72b054a4
* gcc/bernds2011-12-201-0/+30
| | | | | | | | | | | | | | | | | | | | | | * expr.c (store_field): Avoid a direct store if the mode is larger than the size of the bit field. * stor-layout.c (layout_decl): If flag_strict_volatile_bitfields, treat non-volatile bit fields like volatile ones. * toplev.c (process_options): Disallow combination of -fstrict-volatile-bitfields and ABI versions less than 2. * config/arm/arm.c (arm_option_override): Don't enable flag_strict_volatile_bitfields if the ABI version is less than 2. * config/h8300/h8300.c (h8300_option_override): Likewise. * config/rx/rx.c (rx_option_override): Likewise. * config/m32c/m32c.c (m32c_option_override): Likewise. * config/sh/sh.c (sh_option_override): Likewise. gcc/testsuite/ * gcc.target/arm/volatile-bitfields-4.c: New test. * c-c++-common/abi-bf.c: New test. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@182545 138bc75d-0d04-0410-961f-82ee72b054a4
* gcc/testsuite/rsandifo2011-12-191-1/+1
| | | | | | | * gcc.target/mips/mult-1.c: Require -O2. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@182502 138bc75d-0d04-0410-961f-82ee72b054a4
* gcc/testsuite/rsandifo2011-12-191-1/+1
| | | | | | | * gcc.target/mips/ext-2.c: Add NOMIPS16. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@182501 138bc75d-0d04-0410-961f-82ee72b054a4
* libgcc/gjl2011-12-141-0/+86
| | | | | | | | | | | | | | | | | | | | | PR target/50931 * config/avr/t-avr (LIB1ASMSRC): Add _mulpsi3, _mulsqipsi3. * config/avr/lib1funcs.S (__mulpsi3, __mulsqipsi3): New functions. gcc/ PR target/50931 * config/avr/avr.md (mulpsi3): New expander. (*umulqihipsi3, *umulhiqipsi3): New insns. (*mulsqipsi3.libgcc, *mulpsi3.libgcc): New insns. (mulsqipsi3, *mulpsi3): New insn-and-splits. (ashlpsi3): Turn to expander. Move insn code to... (*ashlpsi3): ...this new insn. testsuite/ PR target/50931 * gcc.target/avr/torture/int24-mul.c: New testcase. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@182328 138bc75d-0d04-0410-961f-82ee72b054a4
* 2011-12-13 Andrew Pinski <apinski@cavium.com>pinskia2011-12-133-1/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adam Nemet <anemet@caviumnetworks.com> * config/mips/mips-cpus.def: Add Octeon2. * config/mips/mips-tables.opt: Regenerate. * config/mips/mips.md (define_attr "cpu"): Add Octeon2. * config/mips/driver-native.c (host_detect_local_cpu): Support Octeon2 also. * config/mips/octeon.md (octeon_arith): Add Octeon2. (octeon_condmove): Likewise. (octeon_load): Rename to .. (octeon_load_o1): this. (octeon_load_o2): New reserve. (octeon_cop_o2): New reserve. (octeon_store): Match Octeon2 also. (octeon_brj): Rename to .. (octeon_brj_o1): this. (octeon_brj_o2): New reserve. (octeon_imul3): Rename to ... (octeon_imul3_o1): this. (octeon_imul3_o2): New reserve. (octeon_imul): Rename to ... (octeon_imul_o1): this. (octeon_imul_o2): New reserve. (octeon_mfhilo): Rename to ... (octeon_mfhilo_o1): This. (octeon_mfhilo_o2): New reserve. (octeon_imadd): Rename to ... (octeon_imadd_o1): this. (octeon_imadd_o2): New reserve. (octeon_idiv): Rename to .. (octeon_idiv_o1): This. (octeon_idiv_o2_si): New reserve. (octeon_idiv_o2_di): Likewise. (octeon_unknown): Match Octeon2 also. * config/mips/mips.c (mips_rtx_cost_data): Add Octeon2 cost data. (mips_issue_rate): Octeon2 can issue 2 at a time. * config/mips/mips.h (TARGET_OCTEON): Match Octeon2 also. (TARGET_OCTEON2): New define. (TUNE_OCTEON): Match Octeon2 also. 2011-12-13 Andrew Pinski <apinski@cavium.com> Adam Nemet <anemet@caviumnetworks.com> * gcc.target/mips/mips.exp (mips_option_groups): Fix debug. Add -fdump-* options. * gcc.target/mips/octeon2-pipe-1.c: New testcase. * gcc.target/mips/octeon-pipe-1.c: New testcase. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@182300 138bc75d-0d04-0410-961f-82ee72b054a4
* PR testsuite/51524uros2011-12-132-2/+2
| | | | | | | | | * gcc.target/i386/bmi2-mulx32-1.c (gen_mulx): Add attribute regparm(2). * gcc.target/i386/bmi2-mulx32-2.c (calc_mulx_u32): Ditto. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@182287 138bc75d-0d04-0410-961f-82ee72b054a4
* rs6000: Implement vec_perm_const for all vector ISAsrth2011-12-103-0/+108
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * config/rs6000/altivec.md (altivec_vmrghb): Rewrite pattern as vec_select + vec_concat. (altivec_vmrghh, altivec_vmrghw, altivec_vmrghsf, altivec_vmrglb, altivec_vmrglh, altivec_vmrglw, altivec_vmrglsf): Likewise. (vec_perm_constv16qi): New. (vec_extract_evenv4si, vec_extract_evenv4sf, vpkuhum_nomode, vpkuwum_nomode, vec_extract_oddv8hi, vec_extract_oddv16qi, vec_interleave_high<VI>, vec_interleave_low<VI>): Remove. * config/rs6000/paired.md (paired_merge00): Rewrite pattern as vec_select + vec_concat. (paired_merge10, paired_merge01, paired_merge11): Likewise. (vec_perm_constv2sf): New. (vec_interleave_highv2sf, vec_interleave_lowv2sf, vec_extract_evenv2sf, vec_extract_oddv2sf): Remove. * config/rs6000/spe.md (spe_evmergehi): Rewrite pattern as vec_select + vec_concat. (spe_evmergehilo, spe_evmergelo, spe_evmergelohi): New. (vec_perm_constv2si): New. * config/rs6000/vector.md (vec_interleave_highv4sf, vec_interleave_lowv4sf, vec_interleave_high<VEC_64>, vec_interleave_low<VEC_64>): Remove. * config/rs6000/vsx.md (VS_double): New mode attribute. (UNSPEC_VSX_XXPERMDI): Remove. (vsx_xxpermdi_<VSX_L>_1): Rewrite pattern as vec_select + vec_concat. (vsx_xxmrghw_<VSX_W>, vsx_xxmrglw_<VSX_W>): Likewise. (vsx_xxpermdi_<VSX_L>): Change to expander. (vec_perm_const<VSX_D>): New. (vsx_mergel_<VSX_D>, vsx_mergeh_<VSX_D>): New. * config/rs6000/predicates.md (const_0_to_1_operand): New. (const_2_to_3_operand): New. * config/rs6000/rs6000.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK): New. (altivec_expand_vec_perm_const): New. (rs6000_expand_vec_perm_const_1, rs6000_expand_vec_perm_const): New. (rs6000_vectorize_vec_perm_const_ok): New. (rs6000_do_expand_vec_perm): New. (rs6000_expand_extract_even, rs6000_expand_interleave): New. * config/rs6000/rs6000-builtin.def (VEC_MERGE*): Update rtx codes. * config/rs6000/rs6000-modes.def: Add double-wide vector modes. * config/rs6000/rs6000-protos.h: Update. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@182193 138bc75d-0d04-0410-961f-82ee72b054a4
* gcc:amylaar2011-12-101-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | * config/epiphany/epiphany-protos.h (epiphany_start_function): Declare. * config/epiphany/epiphany.c (epiphany_handle_interrupt_attribute): Split "timer" value into "timer0" and "timer1". Handle page_miss, message and wand. Don't handle static_flag. Adjust warning text. (epiphany_start_function): New function. (epiphany_compute_function_type): Split "timer" value into "timer0" and "timer1". Handle page_miss, message and wand. Don't handle static_flag. (epiphany_expand_epilogue): Don't use frame_insn for status / iret restore. * config/epiphany/epiphany.h: ASM_DECLARE_FUNCTION_NAME: Define. (enum epiphany_function_type): Split EPIPHANY_FUNCTION_TIMER value into EPIPHANY_FUNCTION_TIMER0 and EPIPHANY_FUNCTION_TIMER1. Remove EPIPHANY_FUNCTION_ILINK1 and EPIPHANY_FUNCTION_ILINK2 values. Add EPIPHANY_FUNCTION_PAGE_MISS and EPIPHANY_FUNCTION_MESSAGE values. Rename EPIPHANY_FUNCTION_STATIC_FLAG to EPIPHANY_FUNCTION_WAND. gcc/testsuite: * gcc.target/epiphany/interrupt.c: Add dg-options "-g". Add a scan-assembler-time clause to test for the interupt vector jump. (f): Rename to ... (dma0_handler): ... this. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@182187 138bc75d-0d04-0410-961f-82ee72b054a4
* Fix PR51469 (attr-ifunc fails on ppc); Make #pragma GCC target ("...") ↵meissner2011-12-092-1/+86
| | | | | | change macros on PPC git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@182169 138bc75d-0d04-0410-961f-82ee72b054a4
* 2011-12-08 Andrew Pinski <apinski@cavium.com>pinskia2011-12-094-4/+4
| | | | | | | | | | | | | | | | | | | * config/mips/mips-cpus.def (octeon+): New CPU. * config/mips/mips-tables.opt: Regenerate. * config/mips/mips.h (MIPS_CPP_SET_PROCESSOR): Emit '+' as 'P'. 2011-12-08 Andrew Pinski <apinski@cavium.com> * cc.target/mips/mult-1.c: Forbid all Octeon processors. * gcc.target/mips/dmult-1.c: Likewise. * gcc.target/mips/branch-1.c: Likewise. * gcc.target/mips/extend-1.c: Likewise. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@182152 138bc75d-0d04-0410-961f-82ee72b054a4
* * gcc.target/i386/movdi-rex64.c: Remove unnecessarytejohnson2011-12-081-1/+0
| | | | | | | | unused label. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@182123 138bc75d-0d04-0410-961f-82ee72b054a4
* * gcc.target/i386/movdi-rex64.c: Remove unnecessarytejohnson2011-12-081-1/+1
| | | | | | | | -Wwrite-strings option. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@182121 138bc75d-0d04-0410-961f-82ee72b054a4
* * gcc.target/i386/movdi-rex64.c: New.tejohnson2011-12-081-0/+13
| | | | git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@182119 138bc75d-0d04-0410-961f-82ee72b054a4
* PR target/51393uros2011-12-041-0/+21
| | | | | | | | | | | | | | | | | * config/i386/avxintrin.h (_mm256_insert_epi64): Declare second parameter as long long. testsuite/ChangeLog: 2011-12-04 Uros Bizjak <ubizjak@gmail.com> Jérémie Detrey <Jeremie.Detrey@loria.fr> PR target/51393 * gcc.target/i386/pr51393.c: New test. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@181986 138bc75d-0d04-0410-961f-82ee72b054a4
* PR target/50725jakub2011-11-301-0/+48
| | | | | | | | | | | * function.c (thread_prologue_and_epilogue_insns): If stack_realign_drap, add drap_reg to SET_UP_BY_PROLOGUE regset. * gcc.target/i386/pr50725.c: New test. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@181860 138bc75d-0d04-0410-961f-82ee72b054a4
* PR rtl-optimization/48721jakub2011-11-301-0/+51
| | | | | | | | | | * sched-deps.c (sched_analyze_insn): For SIBLING_CALL_P set reg_pending_barrier to TRUE_BARRIER. * gcc.target/i386/pr48721.c: New test. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@181856 138bc75d-0d04-0410-961f-82ee72b054a4
* gcc/rsandifo2011-11-2742-14/+394
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * config/mips/mips-protos.h (mips_emit_binary): Declare. * config/mips/mips.c (mips_emit_binary): Make global. (mips_set_mips16_mode): Turn off -mfix-r4000 in MIPS16 mode. (mips_conditional_register_usage): Don't treat LO and HI as register operands in MIPS16 mode. (mips_mulsidi3_gen_fn): Use {u,}mulsidi3_{32,64}bit_mips16 for MIPS16 code. * config/mips/predicates.md (muldiv_target_operand): New predicate. (move_operand): Allow hilo_operand. * config/mips/mips.md (mul<mode>3): Explicitly specify LO as the target of MIPS16 multiplies, then move it into the target register. (mul<mode>3_internal, *macc2, *msac2): Use muldiv_target_operand. (<u>mulsidi3_32bit_mips16): New expander. (<u>mulsidi3_32bit): Use muldiv_target_operand. (<u>mulsidi3_32bit_r4000): Disable for ISA_HAS_DSP. (<u>mulsidi3_64bit): Require !TARGET_MIPS16. Split into <u>mulsidi3_64bit_split. (<u>mulsidi3_64bit_mips16): New expander. (<u>mulsidi3_64bit_split): Likewise, using expansions from two previous define_splits. (<u>mulsidi3_64bit_hilo, *muls<u>_di, <u>msubsidi4): Use muldiv_target_operand. (<su>mulsi3_highpart): Use <su>mulsi3_highpart_split for MIPS16 code. (<su>mulsi3_highpart_internal): Require !TARGET_MIPS16. Split into <su>mulsi3_highpart_split. (<su>mulsi3_highpart_split): New expander. (<su>muldi3_highpart): Turn into a define_expand. Use <su>muldi3_highpart_split for MIPS16 code. (<su>muldi3_highpart_internal): Renamed from <su>muldi3_highpart. Require !TARGET_MIPS16. Split into <su>muldi3_highpart_split. (<su>muldi3_highpart_split): New expander. (<u>mulditi3): Explicitly specify LO as the target of MIPS16 multiplies, then move it into the target register. (<u>mulditi3_internal, <u>maddsidi4): Use muldiv_target_operand. (divmod<mode>4, udivmod<mode>4): Turn into define_expands. Use <u>divmod<mode>4_split for MIPS16 code, then explicitly move LO into operand 0. (divmod<mode>4_internal, udivmod<mode>4_internal): Renamed from <u>divmod<mode>4. Use muldiv_target_operand. Require !TARGET_MIPS16. Split into <u>divmod<mode>4_split. (<u>divmod<mode>4_split): New expander. (<u>divmod<GPR:mode>4_hilo_<HILO:mode>): Use muldiv_target_operand. (mfhi<GPR:mode>_<HILO:mode>): Use hilo_operand. gcc/testsuite/ * gcc.target/mips/mult-2.c, gcc.target/mips/mult-3.c, gcc.target/mips/mult-4.c, gcc.target/mips/mult-5.c, gcc.target/mips/mult-6.c, gcc.target/mips/mult-7.c, gcc.target/mips/mult-8.c, gcc.target/mips/mult-9.c, gcc.target/mips/mult-10.c, gcc.target/mips/mult-11.c, gcc.target/mips/mult-12.c, gcc.target/mips/mult-13.c, gcc.target/mips/mult-14.c, gcc.target/mips/mult-15.c, gcc.target/mips/mult-16.c, gcc.target/mips/mult-17.c, gcc.target/mips/mult-18.c, gcc.target/mips/mult-19.c, gcc.target/mips/div-1.c, gcc.target/mips/div-2.c, gcc.target/mips/div-3.c, gcc.target/mips/div-4.c, gcc.target/mips/div-5.c, gcc.target/mips/div-6.c, gcc.target/mips/div-7.c, gcc.target/mips/div-8.c, gcc.target/mips/div-9.c, gcc.target/mips/div-10.c, gcc.target/mips/div-11.c, gcc.target/mips/div-12.c: New tests. * gcc.target/mips/fix-r4000-1.c (foo, bar): Add NOMIPS16. * gcc.target/mips/fix-r4000-2.c (foo): Likewise. * gcc.target/mips/fix-r4000-3.c (foo): Likewise. * gcc.target/mips/fix-r4000-4.c (foo): Likewise. * gcc.target/mips/fix-r4000-5.c (foo): Likewise. * gcc.target/mips/fix-r4000-6.c (foo): Likewise. * gcc.target/mips/fix-r4000-7.c (foo): Likewise. * gcc.target/mips/fix-r4000-8.c (foo): Likewise. * gcc.target/mips/fix-r4000-9.c (foo): Likewise. * gcc.target/mips/fix-r4000-10.c (foo): Likewise. * gcc.target/mips/fix-r4000-11.c (foo): Likewise. * gcc.target/mips/fix-r4000-12.c (foo): Likewise. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@181761 138bc75d-0d04-0410-961f-82ee72b054a4
* gcc/rsandifo2011-11-273-1/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * hard-reg-set.h (target_hard_regs): Add x_accessible_reg_set and x_operand_reg_set. (accessible_reg_set, operand_reg_set): New macros. * reginfo.c (init_reg_sets): Initialize accessible_reg_set and operand_reg_set. (saved_accessible_reg_set, saved_operand_reg_set): New variables. (save_register_info): Save them. (restore_register_info): Restore them. (init_reg_sets_1): Limit operand_reg_set to accessible_reg_set. Remove NO_REGS registers from operand_reg_set. Treat members of operand_reg_set as fixed. * recog.c (general_operand): Check operand_reg_set rather than NO_REGS. (register_operand, nonmemory_operand): Likewise. * varasm.c (make_decl_rtl): Always use DECL_MODE as the mode of register variables. Check accessible_reg_set and operand_reg_set. * config/mips/mips.c (mips_conditional_register_usage): Remove inaccessible register from accessible_reg_set, rather than just making them fixed. gcc/testsuite/ * gcc.target/mips/mips.exp (mips-dg-options): Make -mno-dsp imply -mno-dspr2. * gcc.target/mips/no-dsp-1.c: New test. * gcc.target/mips/soft-float-1.c: Likewise. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@181760 138bc75d-0d04-0410-961f-82ee72b054a4
* Revert revision 181357.hjl2011-11-241-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | gcc/ 2011-11-24 H.J. Lu <hongjiu.lu@intel.com> PR target/51134 * config/i386/i386.h (processor_costs): Revert revision 181357. * config/i386/i386.c (cost models): Likewise. (core_cost): Likewise. (promote_duplicated_reg): Likewise. (promote_duplicated_reg_to_size): Likewise. (processor_target): Likewise. (expand_set_or_movmem_via_loop_with_iter): Likewise. (expand_set_or_movmem_via_loop): Likewise. (emit_strset): Likewise. (expand_movmem_epilogue): Likewise. (expand_setmem_epilogue): Likewise. (expand_movmem_prologue): Likewise. (expand_setmem_prologue): Likewise. (expand_constant_movmem_prologue): Likewise. (expand_constant_setmem_prologue): Likewise. (decide_alg): Likewise. (decide_alignment): Likewise. (ix86_expand_movmem): Likewise. (ix86_expand_setmem): Likewise. (ix86_slow_unaligned_access): Likewise. * config/i386/i386.md (strset): Likewise. * config/i386/sse.md (vec_dupv4si): Likewise. (vec_dupv2di): Likewise. gcc/testsuite/ 2011-11-24 H.J. Lu <hongjiu.lu@intel.com> PR target/51134 * gcc.target/i386/sw-1.c: Revert revision 181357. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@181701 138bc75d-0d04-0410-961f-82ee72b054a4
* PR target/51235uros2011-11-202-0/+29
| | | | | | | | | | | | | | | | | | | | | * config/i386/i386.c (ix86_expand_vcond): Generate TARGET_XOP patterns for supported mode only. PR target/51236 * config/i386/i386.c (ix86_expand_builtin) <IX86_BUILTIN_GATHERALTSIV4DI>: Use CODE_FOR_avx2_gathersiv4di. testsuite/ChangeLog: PR target/51235 * gcc.target/i386/pr51235.c: New test. PR target/51236 * gcc.target/i386/pr51236.c: New test. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@181537 138bc75d-0d04-0410-961f-82ee72b054a4
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