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* Turn HARD_REGNO_MODE_OK into a target hookrsandifo2017-09-041-2/+2
* 2017-06-23 Bernd Edlinger <bernd.edlinger@hotmail.de>edlinger2017-06-231-1/+2
* move several bitmaps from gc memory to the default obstack and use auto_bitmaptbsaunde2017-05-141-56/+28
* use auto_bitmap moretbsaunde2017-05-141-9/+4
* IRA: Don't create new regs for debug insns (PR80429)segher2017-04-191-5/+20
* 2017-03-28 Vladimir Makarov <vmakarov@redhat.com>vmakarov2017-03-281-2/+8
* PR rtl-optimizatoin/79286law2017-02-241-2/+1
* 2017-02-16 Alan Modra <amodra@gmail.com>law2017-02-161-2/+54
* Update copyright years.jakub2017-01-011-1/+1
* PR rtl-optimization/78669bernds2016-12-121-0/+8
* GCC caches the whether a function is a leaf in crtl->is_leaf. Using thiswilco2016-12-071-5/+11
* ira: Don't substitute into TRAP_IF insns (PR78610)segher2016-11-301-0/+5
* * ira.c (ira_update_equiv_info_by_shuffle_insn): Use copy_rtxjakub2016-11-301-1/+1
* R_MIPS_JALR failuresamodra2016-11-161-1/+1
* 2016-11-10 Vladimir Makarov <vmakarov@redhat.com>vmakarov2016-11-101-1/+1
* * target.def (compute_pressure_classes): New target hook.pthaugen2016-11-071-64/+71
* 2016-10-18 Richard Biener <rguenther@suse.de>rguenth2016-10-181-0/+2
* Move MEMMODEL_* from coretypes.h to memmodel.hthopre012016-10-131-0/+1
* [PATCH][IRA]Initialize ira_use_lra_p early by moving the initialization intorenlin2016-09-231-1/+2
* 2016-09-10 Bernd Edlinger <bernd.edlinger@hotmail.de>edlinger2016-09-091-16/+1
* PR c/7652mpolacek2016-08-121-0/+1
* gcc/edlinger2016-06-061-1/+1
* ira.c bb_loop_depth againamodra2016-05-281-0/+1
* ira.c bb_loop_depthamodra2016-05-261-0/+2
* PR70890, stage2 miscompilationamodra2016-05-031-0/+16
* Fix PR44281, bad RA with global regs.bernds2016-05-031-1/+1
* Goodbye REG_FREQ_CALLS_CROSSED and REG_N_THROWING_CALLS_CROSSEDamodra2016-04-301-2/+0
* Goodbye REG_LIVE_LENGTHamodra2016-04-301-8/+3
* ira.c validate_equiv_memamodra2016-04-301-30/+51
* ira.c use DF infrastructure for combine_and_move_insnsamodra2016-04-291-109/+86
* ira.c combine_and_move_insns, and ordering of functionsamodra2016-04-291-68/+16
* ira.c tidies: validate_equiv_mem_from_storeamodra2016-04-291-14/+19
* ira.c tidies: split update_reg_equivsamodra2016-04-291-63/+62
* ira.c tidies: move pdx_subregs into reg_equivamodra2016-04-291-15/+12
* PR rtl-optimization/70460jakub2016-03-311-12/+12
* PR rtl-optimization/70263law2016-03-181-2/+19
* Fix thinko in indirect_jump_optimizeamodra2016-03-151-8/+18
* PR69195, Reload confused by invalid reg_equivamodra2016-03-101-50/+52
* PR ada/70017ebotcazou2016-03-011-2/+15
* Don't make something with an autoinc an equivalencing insn (PR69752).bernds2016-02-151-1/+2
* 2016-02-08 Richard Biener <rguenther@suse.de>rguenth2016-02-081-2/+3
* 2016-01-29 Vladimir Makarov <vmakarov@redhat.com>vmakarov2016-01-291-0/+1
* * ira.c (ira): Update regstat data if we deleted insns.bernds2016-01-191-3/+11
* Update copyright years.jakub2016-01-041-1/+1
* IRA: Fix % constraint modifier handling on disabled alternatives.krebbel2015-12-181-6/+8
* PR target/67265ebotcazou2015-11-111-3/+6
* 2015-10-30 Andrew MacLeod <amacleod@redhat.com>amacleod2015-10-301-10/+0
* 2015-10-29 Andrew MacLeod <amacleod@redhat.com>amacleod2015-10-291-10/+8
* [PATCH 7/9] ENABLE_CHECKING refactoring: middle-end, LTO FElaw2015-10-281-3/+3
* [PATCH] Move RTL printing code from sched-vis.c into print-rtl.claw2015-10-211-0/+1