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* sh-linux: Install __sync libfuncs.rth2011-11-122-0/+12
* hppa: Install __sync libfuncs for linux.rth2011-11-123-0/+11
* gcc:iains2011-11-121-0/+1
* Fix Linux/sparc build after generic asm output optimizations.davem2011-11-122-18/+0
* * config/i386/i386-protos.h (ix86_maybe_emit_epilogue_vzeroupper):jakub2011-11-113-4/+15
* * config/alpha/elf.h (ELF_ASCII_ESCAPES): Rename from ESCAPES.uros2011-11-111-4/+5
* PR target/50762uros2011-11-113-5/+11
* Revert sparc vec_init improvements as they cause 64-bit regressions.davem2011-11-112-394/+100
* * final.c, output.h (fprint_whex, fprint_w, fprint_ul, sprint_ul):jason2011-11-112-110/+20
* PR target/50911jakub2011-11-091-0/+4
* * function.h (requires_stack_frame_p): New prototype.jakub2011-11-091-4/+60
* * config/sparc/sparc.c (output_v8plus_shift): Take INSN parameter firstebotcazou2011-11-093-26/+68
* Matthew Gretton-Dann <matthew.gretton-dann@arm.com>rearnsha2011-11-094-1/+6
* * config/rs6000/vector.md (vcondv4sfv4si, vcondv4siv4sf,jakub2011-11-092-2/+64
* * doc/tm.texi.in (MODE_CODE_BASE_REG_CLASS): Add address spaceuweigand2011-11-085-14/+16
* * config/i386/i386.c (ix86_preferred_simd_mode): Even for TARGET_AVXjakub2011-11-081-4/+4
* * config/i386/sse.md (*avx_vperm2f128<mode>3_nozero): Emit maskjakub2011-11-081-0/+4
* Merge from transactional-memory branch.aldyh2011-11-082-1/+202
* * config/i386/i386-bultin-types.def (V8SI_FTYPE_V4DF_V4DF): Add.jakub2011-11-072-3/+12
* * config/cris/constraints.md: New file.aesok2011-11-074-173/+204
* * config/i386/i386.c (ix86_builtin_vectorized_function): Handleuros2011-11-072-2/+6
* * config/avr/avr.c (output_reload_in_const): Can handle CONSTANT_Pgjl2011-11-071-106/+50
* * config/avr/constraints.md (Cm2): New constraint for int -2.gjl2011-11-072-6/+21
* * config/i386/i386.c (ix86_expand_builtin): If gather maskjakub2011-11-073-3/+112
* PR tree-optimization/50789jakub2011-11-073-68/+188
* * config/i386/f16cintrin: Remove extra _X86INTRIN_H_INCLUDED check.uros2011-11-071-5/+3
* 2011-11-07 Tristan Gingold <gingold@adacore.com>gingold2011-11-074-0/+260
* 2011-11-07 Tristan Gingold <gingold@adacore.com>gingold2011-11-075-115/+85
* gcc/kyukhin2011-11-073-1/+30
* 2011-11-07 Tristan Gingold <gingold@adacore.com>gingold2011-11-071-0/+8
* 2011-11-06 Quentin Neill <quentin.neill@amd.com>hjagasia2011-11-071-3/+3
* 2011-11-06 Sebastian Huber <sebastian.huber@embedded-brains.de>corsepiu2011-11-072-0/+37
* Get rid of sparc's UNSPEC_SHORT_LOAD.davem2011-11-071-11/+22
* PR target/30282amodra2011-11-071-1/+1
* * config/i386/cygwin.h (LIBGCJ_SONAME): Updated to match recentdavek2011-11-072-2/+2
* * config/pa/pa.c (pa_hpux_init_libfuncs): Rename to pa_init_libfuncs.danglin2011-11-061-45/+50
* Check in patch/merge from cxx-mem-model Branchamacleod2011-11-062-130/+333
* Remove unwanted svn:executable properties that svn add had decided to add.amylaar2011-11-068-0/+0
* More improvements to sparc VIS vec_init code generation.davem2011-11-062-99/+363
* gcc:amylaar2011-11-0513-0/+7258
* PR tree-optimization/50693jakub2011-11-052-2/+28
* 2011-11-05 Peter Dufault <dufault@hda.com>,corsepiu2011-11-051-0/+4
* 2011-11-05 Ralf Corsépius <ralf.corsepius@rtems.org>corsepiu2011-11-052-18/+35
* 2011-11-04 Quentin Neill <quentin.neill@amd.com>hjagasia2011-11-052-59/+98
* Fix sparc regression due to recent movcc pattern changes.davem2011-11-041-6/+7
* 2010-10-09 Ralf Corsépius <ralf.corsepius@rtems.org>corsepiu2011-11-041-0/+21
* PR target/50979ebotcazou2011-11-041-0/+1
* 2011-11-04 Jiangning Liu <jiangning.liu@arm.com>jye22011-11-041-0/+2
* gcc/gjl2011-11-046-93/+1227
* 2011-11-04 Thomas Doerfler <thomas.doerfler@embedded-brains.de>joel2011-11-042-4/+39
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