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* PR target/72867uros2016-08-155-77/+70
* 2016-08-15 Richard Biener <rguenther@suse.de>rguenth2016-08-151-2/+2
* * config/i386/avx512ifmaintrin.h: Fix whitespace.uros2016-08-147-120/+95
* * config/i386/avx512bwintrin.h: Whitespace fixes.uros2016-08-142-34/+25
* PR target/76342uros2016-08-144-121/+119
* [gcc]meissner2016-08-121-7/+15
* * config/i386/sse.md (avx512dq_vextract<shuffletype>64x2_1_maskm,jakub2016-08-121-4/+4
* 2016-08-12 Bill Schmidt <wschmidt@linux.vnet.ibm.com>wschmidt2016-08-121-5/+9
* PR c/7652mpolacek2016-08-125-2/+24
* [gcc]wschmidt2016-08-111-2/+16
* Support TImode CONST_WIDE_INT store in 64-bit STVhjl2016-08-111-3/+20
* Use TImode for piecewise move in 64-bit modehjl2016-08-111-2/+12
* S/390: Provide low-level builtins with __int128 ops.krebbel2016-08-116-110/+91
* S/390: Fix vlvg vlgv low-level builtins.krebbel2016-08-111-10/+10
* * config/aarch64/aarch64-simd.md (vcond<mode><mode>): Deleteamker2016-08-111-4/+0
* * config/aarch64/aarch64-simd.md (vec_cmp<mode><v_cmp_result>: Initamker2016-08-111-1/+3
* gcc/ChangeLog:kelvin2016-08-107-18/+421
* * config/aarch64/iterators.md (V_cmp_mixed, v_cmp_mixed): New.amker2016-08-102-326/+63
* * config/aarch64/aarch64-simd.md (vec_cmp<mode><mode>): New pattern.amker2016-08-101-0/+269
* [gcc]meissner2016-08-101-0/+3
* [RS6000] e500 part of pr71680amodra2016-08-101-0/+2
* * config/i3836/avx512fintrin.h (_mm512_cvtsepi64_epi32): Removejakub2016-08-091-1/+0
* [PATCH][PR64971]Convert function pointer to Pmode when emit call.renlin2016-08-091-15/+0
* PR target/72843uros2016-08-091-4/+4
* MIPS: Use create_tmp_var_raw in mips_atomic_assign_expand_fenvmpf2016-08-091-3/+3
* * config/avr/driver-avr.c (specfiles_doc_url): Remove.denisc2016-08-081-55/+10
* [RS6000] TOC refs generated during reloadamodra2016-08-081-8/+12
* [RS6000] PR72802 part 2, reload ICEamodra2016-08-081-11/+16
* [RS6000] PR72802 part 1, fix constraints for lxssp/stxsspamodra2016-08-085-16/+38
* [RS6000] Fix wrong mode regamodra2016-08-071-1/+1
* [AArch64] Handle HFAs of float16 types properlyjgreenhalgh2016-08-053-17/+32
* [RS6000] rs6000_preferred_reload_classamodra2016-08-051-19/+0
* PR target/72805uros2016-08-041-24/+24
* 2016-08-04 Andrew Pinski <apinski@cavium.com>pinskia2016-08-041-1/+19
* PR 55181gjl2016-08-041-0/+23
* * config/rs6000/rs6000.c (rs6000_option_override_internal): Make LRAbergner2016-08-031-0/+4
* gcc/nathan2016-08-031-4/+8
* [RS6000] power8 unaligned fp load/storeamodra2016-08-032-6/+6
* [RS6000] cost SLOW_UNALIGNED_ACCESSamodra2016-08-031-0/+5
* [RS6000] Force source of fix_trunc<mode>si2 to regamodra2016-08-031-5/+5
* [RS6000] Remove negative from option help stringsamodra2016-08-031-18/+18
* [RS6000] Delete duplicate codeamodra2016-08-031-41/+17
* [Patch AArch64 Obvious] Fix Bootstrap for my mistake in r238977jgreenhalgh2016-08-021-1/+1
* [PATCH AArch64] Add more AArch64 NEON intrinsicsjgreenhalgh2016-08-025-37/+56
* [gcc]meissner2016-08-013-16/+234
* PR target/71948gjl2016-08-011-1/+1
* This patch optimizes the prolog and epilog code to reduce the number ofwilco2016-08-012-199/+188
* Convert V1TImode register to TImode in debug insnhjl2016-08-011-0/+6
* PR target/72767gjl2016-08-011-2/+2
* * doc/extend.texi (AVR Built-in Functions): Documentgjl2016-08-012-0/+26
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