| Commit message (Collapse) | Author | Age | Files | Lines |
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2011-12-16 Tristan Gingold <gingold@adacore.com>
* config/alpha/vms.h (USE_TM_CLONE_REGISTRY): Define.
From-SVN: r182408
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2011-12-16 Tristan Gingold <gingold@adacore.com>
* config/alpha/alpha.c (alpha_use_linkage): Follow transparent alias.
(alpha_write_one_linkage): Use assemble_name to emit linkage name.
From-SVN: r182407
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2011-12-16 Tristan Gingold <gingold@adacore.com>
* config/vms/t-vms (vms.o, vms-c.o): Force output filename.
From-SVN: r182406
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2011-12-16 Tristan Gingold <gingold@adacore.com>
* config/vms/vms.c (VMS_CRTL_GLOBAL): Define.
(vms_patch_builtins): Handle.
* config/vms/vms-crtlmap.map: Add an entry for environ.
From-SVN: r182405
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* config/rl78/rl78.md (return): Rename to rl78_return.
* config/rl78/rl78.c (rl78_expand_epilogue): Use new name.
(rl78_expand_eh_epilogue): Use new name.
(rl78_calculate_death_notes): Likewise.
From-SVN: r182390
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add pattern_def_seq.
* tree-vectorizer.h (struct _stmt_vec_info): Remove pattern_def_stmt
field, add pattern_def_seq.
(STMT_VINFO_PATTERN_DEF_STMT): Remove.
(STMT_VINFO_PATTERN_DEF_SEQ): Define.
(NUM_PATTERNS): Bump to 10.
* tree-vect-loop.c (vect_determine_vectorization_factor,
vect_transform_loop): Adjust for pattern def changing from a single
gimple stmt to gimple_seq.
* tree-vect-stmts.c (vect_analyze_stmt, new_stmt_vec_info,
free_stmt_vec_info): Likewise.
* tree-vect-patterns.c (vect_recog_over_widening_pattern,
vect_recog_vector_vector_shift_pattern,
vect_recog_mixed_size_cond_pattern, adjust_bool_pattern_cast,
adjust_bool_pattern, vect_mark_pattern_stmts): Likewise.
(vect_recog_sdivmod_pow2_pattern): New function.
(vect_vect_recog_func_ptrs): Add it.
* config/i386/sse.md (vcond<V_256:mode><VI_256:mode>,
vcond<V_128:mode><VI124_128:mode>, vcond<VI8F_128:mode>v2di):
Use general_operand instead of nonimmediate_operand for
operand 5 and no predicate for operands 1 and 2.
* config/i386/i386.c (ix86_expand_int_vcond): Optimize
x < 0 ? -1 : 0 and x < 0 ? 1 : 0 into vector arithmetic
resp. logical shift.
* gcc.dg/vect/vect-sdivmod-1.c: New test.
From-SVN: r182388
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* config/avr/avr-protos.h (print_operand): Remove.
(print_operand_address): Remove.
* config/avr/avr.h (PRINT_OPERAND): Remove.
(PRINT_OPERAND_ADDRESS): Remove.
(PRINT_OPERAND_PUNCT_VALID_P): Remove.
* config/avr/avr.c (TARGET_PRINT_OPERAND): New hook define.
(TARGET_PRINT_OPERAND_ADDRESS): New hook define.
(TARGET_PRINT_OPERAND_PUNCT_VALID_P): New hook define.
(print_operand_address): Rename to...
(avr_print_operand_address): ...this and make static.
(print_operand): Rename to...
(avr_print_operand): ...this and make static.
(avr_print_operand_punct_valid_p): New static function.
From-SVN: r182386
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2011-12-15 Andreas Tobler <andreast@fgznet.ch>
* config/i386/freebsd.h (TARGET_ASM_FILE_END): Define.
From-SVN: r182382
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when that is in use.
gcc:
* config/rs6000/rs6000.c (rs6000_emit_prologue): Move update of
VRSave mask to save_world() when that is in use.
libgcc:
* config/rs6000/darwin-world.S (toplevel): Make it clear that this
function is not used for PPC64.
(save_world): Amend comments. Update the VRsave mask to reflect the
saved regs.
(rest_world): Update comments, do not clobber r10, do not use r8.
(eh_rest_world_r10): Amend comments, do not use r8.
(rest_world_eh_r7r8): Rename as local Lrest_world_eh_r7, since r8 is
no longer used, move restore of CR and target address to the end of
the routine.
From-SVN: r182376
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* config/arm/arm.h (REGISTER_MOVE_COST, MEMORY_MOVE_COST): Remove.
* config/arm/arm.c (arm_memory_move_cost, arm_register_move_cost):
New functions.
(TARGET_REGISTER_MOVE_COST, TARGET_MEMORY_MOVE_COST): Define.
From-SVN: r182369
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PR target/51050
* config/avr/avr.c (expand_epilogue): Don't build SUBREG of fp.
(avr_prologue_setup_frame): Ditto.
From-SVN: r182363
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Make sure its set for all CMP, CMN, TST instructions,
which do work inside IT blocks.
* config/arm/arm.md (*addsi3_compare0_scratch): Set predicable.
(*compare_negsi_si, *compare_addsi2_op0): Likewise.
(*compare_addsi2_op1, *zeroextractsi_compare0_scratch): Likewise.
(*compareqi_eq0, *arm_cmpsi_insn, *arm_cmpsi_negshiftsi_si): Likewise.
From-SVN: r182353
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libgcc/
PR target/50931
* config/avr/t-avr (LIB1ASMSRC): Add _mulpsi3, _mulsqipsi3.
* config/avr/lib1funcs.S (__mulpsi3, __mulsqipsi3): New functions.
gcc/
PR target/50931
* config/avr/avr.md (mulpsi3): New expander.
(*umulqihipsi3, *umulhiqipsi3): New insns.
(*mulsqipsi3.libgcc, *mulpsi3.libgcc): New insns.
(mulsqipsi3, *mulpsi3): New insn-and-splits.
(ashlpsi3): Turn to expander. Move insn code to...
(*ashlpsi3): ...this new insn.
testsuite/
PR target/50931
* gcc.target/avr/torture/int24-mul.c: New testcase.
From-SVN: r182328
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From-SVN: r182301
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2011-12-13 Andrew Pinski <apinski@cavium.com>
Adam Nemet <anemet@caviumnetworks.com>
* config/mips/mips-cpus.def: Add Octeon2.
* config/mips/mips-tables.opt: Regenerate.
* config/mips/mips.md (define_attr "cpu"): Add Octeon2.
* config/mips/driver-native.c (host_detect_local_cpu): Support Octeon2 also.
* config/mips/octeon.md (octeon_arith): Add Octeon2.
(octeon_condmove): Likewise.
(octeon_load): Rename to ..
(octeon_load_o1): this.
(octeon_load_o2): New reserve.
(octeon_cop_o2): New reserve.
(octeon_store): Match Octeon2 also.
(octeon_brj): Rename to ..
(octeon_brj_o1): this.
(octeon_brj_o2): New reserve.
(octeon_imul3): Rename to ...
(octeon_imul3_o1): this.
(octeon_imul3_o2): New reserve.
(octeon_imul): Rename to ...
(octeon_imul_o1): this.
(octeon_imul_o2): New reserve.
(octeon_mfhilo): Rename to ...
(octeon_mfhilo_o1): This.
(octeon_mfhilo_o2): New reserve.
(octeon_imadd): Rename to ...
(octeon_imadd_o1): this.
(octeon_imadd_o2): New reserve.
(octeon_idiv): Rename to ..
(octeon_idiv_o1): This.
(octeon_idiv_o2_si): New reserve.
(octeon_idiv_o2_di): Likewise.
(octeon_unknown): Match Octeon2 also.
* config/mips/mips.c (mips_rtx_cost_data): Add Octeon2 cost data.
(mips_issue_rate): Octeon2 can issue 2 at a time.
* config/mips/mips.h (TARGET_OCTEON): Match Octeon2 also.
(TARGET_OCTEON2): New define.
(TUNE_OCTEON): Match Octeon2 also.
2011-12-13 Andrew Pinski <apinski@cavium.com>
Adam Nemet <anemet@caviumnetworks.com>
* gcc.target/mips/mips.exp (mips_option_groups): Fix debug. Add
-fdump-* options.
* gcc.target/mips/octeon2-pipe-1.c: New testcase.
* gcc.target/mips/octeon-pipe-1.c: New testcase.
Co-Authored-By: Adam Nemet <anemet@caviumnetworks.com>
From-SVN: r182300
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From-SVN: r182299
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* tree.def (VEC_INTERLEAVE_HIGH_EXPR, VEC_INTERLEAVE_LOW_EXPR): Remove.
* gimple-pretty-print.c (dump_binary_rhs): Don't handle
VEC_INTERLEAVE_HIGH_EXPR and VEC_INTERLEAVE_LOW_EXPR.
* expr.c (expand_expr_real_2): Likewise.
* tree-cfg.c (verify_gimple_assign_binary): Likewise.
* cfgexpand.c (expand_debug_expr): Likewise.
* tree-inline.c (estimate_operator_cost): Likewise.
* tree-pretty-print.c (dump_generic_node): Likewise.
* tree-vect-generic.c (expand_vector_operations_1): Likewise.
* fold-const.c (fold_binary_loc): Likewise.
* doc/generic.texi (VEC_INTERLEAVE_HIGH_EXPR,
VEC_INTERLEAVE_LOW_EXPR): Remove documentation.
* optabs.c (optab_for_tree_code): Don't handle
VEC_INTERLEAVE_HIGH_EXPR and VEC_INTERLEAVE_LOW_EXPR.
(expand_binop, init_optabs): Remove vec_interleave_high_optab
and vec_interleave_low_optab.
* genopinit.c (optabs): Likewise.
* optabs.h (OTI_vec_interleave_high, OTI_vec_interleave_low): Remove.
(vec_interleave_high_optab, vec_interleave_low_optab): Remove.
* doc/md.texi (vec_interleave_high, vec_interleave_low): Remove
documentation.
* tree-vect-stmts.c (gen_perm_mask): Renamed to...
(vect_gen_perm_mask): ... this. No longer static.
(perm_mask_for_reverse, vectorizable_load): Adjust callers.
* tree-vectorizer.h (vect_gen_perm_mask): New prototype.
* tree-vect-data-refs.c (vect_strided_store_supported): Don't try
VEC_INTERLEAVE_*_EXPR, use can_vec_perm_p instead of
can_vec_perm_for_code_p.
(vect_permute_store_chain): Generate VEC_PERM_EXPR with interleaving
masks instead of VEC_INTERLEAVE_HIGH_EXPR and VEC_INTERLEAVE_LOW_EXPR.
* config/i386/i386.c (expand_vec_perm_interleave2): If
expand_vec_perm_interleave3 would handle it, return false.
(expand_vec_perm_broadcast_1): Don't use vec_interleave_*_optab.
From-SVN: r182298
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* config/sparc/tso.h: New file.
* config.gcc (sparc-*-linux*, sparc*-*-solaris2*): Use it.
* config/sparc/sparc.c (sparc_option_override): Honor
SUBTARGET_DEFAULT_MEMORY_MODEL.
* config/sparc/sparc.h (SUBTARGET_DEFAULT_MEMORY_MODEL): New.
From-SVN: r182297
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gcc:
* config/darwin-sections.def (zobj_const_data_section): Fix over-
length section name.
From-SVN: r182220
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TARGET_BIG_ENDIAN.
* config/rs6000/rs6000.c (rs6000_expand_interleave): Use
BYTES_BIG_ENDIAN, not TARGET_BIG_ENDIAN.
From-SVN: r182218
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* config/rs6000/altivec.md (altivec_vmrghb): Rewrite pattern as
vec_select + vec_concat.
(altivec_vmrghh, altivec_vmrghw, altivec_vmrghsf, altivec_vmrglb,
altivec_vmrglh, altivec_vmrglw, altivec_vmrglsf): Likewise.
(vec_perm_constv16qi): New.
(vec_extract_evenv4si, vec_extract_evenv4sf, vpkuhum_nomode,
vpkuwum_nomode, vec_extract_oddv8hi, vec_extract_oddv16qi,
vec_interleave_high<VI>, vec_interleave_low<VI>): Remove.
* config/rs6000/paired.md (paired_merge00): Rewrite pattern as
vec_select + vec_concat.
(paired_merge10, paired_merge01, paired_merge11): Likewise.
(vec_perm_constv2sf): New.
(vec_interleave_highv2sf, vec_interleave_lowv2sf,
vec_extract_evenv2sf, vec_extract_oddv2sf): Remove.
* config/rs6000/spe.md (spe_evmergehi): Rewrite pattern as
vec_select + vec_concat.
(spe_evmergehilo, spe_evmergelo, spe_evmergelohi): New.
(vec_perm_constv2si): New.
* config/rs6000/vector.md (vec_interleave_highv4sf,
vec_interleave_lowv4sf, vec_interleave_high<VEC_64>,
vec_interleave_low<VEC_64>): Remove.
* config/rs6000/vsx.md (VS_double): New mode attribute.
(UNSPEC_VSX_XXPERMDI): Remove.
(vsx_xxpermdi_<VSX_L>_1): Rewrite pattern as vec_select + vec_concat.
(vsx_xxmrghw_<VSX_W>, vsx_xxmrglw_<VSX_W>): Likewise.
(vsx_xxpermdi_<VSX_L>): Change to expander.
(vec_perm_const<VSX_D>): New.
(vsx_mergel_<VSX_D>, vsx_mergeh_<VSX_D>): New.
* config/rs6000/predicates.md (const_0_to_1_operand): New.
(const_2_to_3_operand): New.
* config/rs6000/rs6000.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK): New.
(altivec_expand_vec_perm_const): New.
(rs6000_expand_vec_perm_const_1, rs6000_expand_vec_perm_const): New.
(rs6000_vectorize_vec_perm_const_ok): New.
(rs6000_do_expand_vec_perm): New.
(rs6000_expand_extract_even, rs6000_expand_interleave): New.
* config/rs6000/rs6000-builtin.def (VEC_MERGE*): Update rtx codes.
* config/rs6000/rs6000-modes.def: Add double-wide vector modes.
* config/rs6000/rs6000-protos.h: Update.
From-SVN: r182193
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* genmodes.c (struct mode_data): Remove wider_2x member.
(blank_mode): Adjust initializer.
(calc_wider_mode): Use XALLOCAVEC.
(emit_move_wider): Select double-width same-element vectors for
2xwider vectors.
* machmode.h (GET_MODE_2XWIDER_MODE): Update documentation.
* config/i386/i386.c (doublesize_vector_mode): Remove.
(expand_vselect_vconcat): Use GET_MODE_2XWIDER_MODE instead.
From-SVN: r182191
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gcc:
* config/epiphany/epiphany-protos.h (epiphany_start_function): Declare.
* config/epiphany/epiphany.c (epiphany_handle_interrupt_attribute):
Split "timer" value into "timer0" and "timer1".
Handle page_miss, message and wand. Don't handle static_flag.
Adjust warning text.
(epiphany_start_function): New function.
(epiphany_compute_function_type): Split "timer" value into "timer0"
and "timer1". Handle page_miss, message and wand.
Don't handle static_flag.
(epiphany_expand_epilogue): Don't use frame_insn for status / iret
restore.
* config/epiphany/epiphany.h: ASM_DECLARE_FUNCTION_NAME: Define.
(enum epiphany_function_type):
Split EPIPHANY_FUNCTION_TIMER value into EPIPHANY_FUNCTION_TIMER0
and EPIPHANY_FUNCTION_TIMER1.
Remove EPIPHANY_FUNCTION_ILINK1 and EPIPHANY_FUNCTION_ILINK2 values.
Add EPIPHANY_FUNCTION_PAGE_MISS and EPIPHANY_FUNCTION_MESSAGE values.
Rename EPIPHANY_FUNCTION_STATIC_FLAG to EPIPHANY_FUNCTION_WAND.
gcc/testsuite:
* gcc.target/epiphany/interrupt.c: Add dg-options "-g".
Add a scan-assembler-time clause to test for the interupt vector jump.
(f): Rename to ...
(dma0_handler): ... this.
From-SVN: r182187
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* config/epiphany/epiphany.h (EPIPHANY_RETURN_REGNO): New macro,
broken out of ..
(INCOMING_RETURN_ADDR_RTX) .. this. Use EPIPHANY_RETURN_REGNO.
(DWARF_FRAME_RETURN_COLUMN): New macro.
From-SVN: r182186
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* config/epiphany/epiphany.h (USE_LOAD_POST_INCREMENT): Define.
(USE_LOAD_POST_DECREMENT, USE_STORE_POST_INCREMENT): Likewise.
(USE_STORE_POST_DECREMENT): Likewise.
From-SVN: r182185
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language has support for TM.
PR/51291
* tree.c (build_common_builtin_nodes): Do not use TM_PURE
attribute unless language has support for TM.
* config/i386/i386.c (ix86_init_tm_builtins): Exit gracefully in
the absence of TM builtins.
From-SVN: r182179
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change macros on PPC
From-SVN: r182169
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PR target/51425
* config/avr/avr.md (config/avr/avr.md, *sbix_branch_tmp): Use
zero_extract:QIHI instead of zero_extract:HI.
From-SVN: r182159
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2011-12-08 Andrew Pinski <apinski@cavium.com>
* config/mips/mips-cpus.def (octeon+): New CPU.
* config/mips/mips-tables.opt: Regenerate.
* config/mips/mips.h (MIPS_CPP_SET_PROCESSOR): Emit '+' as 'P'.
2011-12-08 Andrew Pinski <apinski@cavium.com>
* cc.target/mips/mult-1.c: Forbid all Octeon processors.
* gcc.target/mips/dmult-1.c: Likewise.
* gcc.target/mips/branch-1.c: Likewise.
* gcc.target/mips/extend-1.c: Likewise.
From-SVN: r182152
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2011-12-08 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
PR target/50395
* config/s390/s390.c (s390_mainpool_finish): Emit the jump over
the literal pool as jump insn.
From-SVN: r182116
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2011-12-06 Joel Sherrill <joel.sherrill@oarcorp.com>
* config/rs6000/rtems.h: Switch to using global_options_set
in SUBSUBTARGET_OVERRIDE_OPTIONS.
From-SVN: r182068
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* config/sparc/visintrin.h: Add appropriate __VIS__ cpp protection.
From-SVN: r182067
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* config/avr/avr.c (avr_file_start): Fix missing ,
From-SVN: r182058
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PR target/51354
* config/i386/i386.c (ix86_emit_leave): Call ix86_add_cfa_restore_note
unconditionally.
* gcc.c-torture/compile/pr51354.c: New test.
From-SVN: r182056
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(their manual is bogus).
* config/avr/avr-mcus.def (avr_mcu_types): ATtiny4313 and
AT86RF401 have a 16-bit SP (their manual is bogus).
Forward-port from gcc-4_6-branch r181936 2011-12-02.
From-SVN: r182053
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libgcc/
Forward-port from gcc-4_6-branch r181936 2011-12-02.
PR target/51345
PR target/51002
* config/avr/lib1funcs.S (__prologue_saves__,
__epilogue_restores__, __divdi3_moddi3): Enclose parts using
__SP_H__ in !defined (__AVR_HAVE_8BIT_SP__). Add FIXME comments.
gcc/
Forward-port from gcc-4_6-branch r181936 2011-12-02.
PR target/51002
* config/avr/avr.md (movhi_sp_r): Set insn condition to
!AVR_HAVE_8BIT_SP.
* config/avr/avr.c (output_movhi): Use "clr%B0" instead of "in
%B0,__SP_H__" if AVR_HAVE_8BIT_SP.
(avr_file_start): Only print "__SP_H__ = 0x3e" if !AVR_HAVE_8BIT_SP.
From-SVN: r182052
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from c-family)
PR target/51409
PR target/49868
* config/avr/avr.h (ADDR_SPACE_PGM, ADDR_SPACE_PGM1,
ADDR_SPACE_PGM2, ADDR_SPACE_PGM3, ADDR_SPACE_PGM4,
ADDR_SPACE_PGM5, ADDR_SPACE_PGMX): Write as enum.
(avr_addrspace_t): New typedef.
(avr_addrspace): New declaration.
* config/avr/avr-c.c (avr_toupper): New static function.
(avr_register_target_pragmas, avr_cpu_cpp_builtins): Use
avr_addrspace to get address space information.
* config/avr/avr.c (avr_addrspace): New variable.
(avr_out_lpm, avr_pgm_check_var_decl, avr_insert_attributes,
avr_asm_named_section, avr_section_type_flags,
avr_asm_select_section, avr_addr_space_address_mode,
avr_addr_space_convert, avr_emit_movmemhi): Use it.
(avr_addr_space_pointer_mode): Forward to avr_addr_space_address_mode.
(avr_pgm_segment): Remove.
From-SVN: r182051
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gcc:
* config/rs6000/rs6000.c (darwin_rs6000_override_options): Initialize
rs6000_current_abi.
From-SVN: r182042
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PR target/50906
* config/rs6000/rs6000.c (rs6000_emit_prologue <TARGET_SPE_ABI>):
Do not mark r11 setup as frame-related. Pass correct offset to
rs6000_emit_savres_rtx. Correct out-of-line rs6000_frame_related
arguments. Correct sp_offset. Remove "offset" fudge from
in-line rs6000_frame_related call. Rename misleading variable.
Fix comments and whitespace. Tidy some expressions.
(rs6000_emit_epilogue <TARGET_SPE_ABI>): Always set frame_reg_rtx
to r11 in out-of-line case. Correct sp_offset. Pass correct
offset to rs6000_emit_savres_rtx. Rename misleading variable.
Fix comments and whitespace. Tidy some expressions.
(rs6000_emit_epilogue <non-TARGET_SPE_ABI>): Add sp_offset
adjustment when !saving_GPRs_inline. Correct register mode
used in address calcs.
(rs6000_emit_epilogue <non-TARGET_SPE_ABI>): Similarly when
!restoring_GPRs_inline.
From-SVN: r182039
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From-SVN: r182038
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gcc/
PR target/51408
* config/arm/arm.md (*minmax_arithsi): Always require the else
clause in the MINUS case.
gcc/testsuite/
PR target/51408
* gcc.dg/pr51408.c: New.
From-SVN: r182014
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2011-12-05 Ramana Radhakrishnan <ramana.radhakrishnan@linaro.org>
* config/arm/arm.c (vfp3_const_double_for_fract_bits): Define.
* config/arm/arm-protos.h (vfp3_const_double_for_fract_bits): Declare.
* config/arm/constraints.md ("Dt"): New constraint.
* config/arm/predicates.md (const_double_vcvt_power_of_two_reciprocal):
New.
* config/arm/vfp.md (*arm_combine_vcvt_f32_s32): New.
(*arm_combine_vcvt_f32_u32): New.
From-SVN: r182005
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* config/sh/linux.h (TARGET_DEFAULT): Add MASK_SOFT_ATOMIC.
* config/sh/sync.md: New file.
* config/sh/sh.md: Include sync.md.
* config/sh/sh.opt (msoft-atomic): New option.
* doc/invoke.texi (SH Options): Document it.
From-SVN: r181995
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PR target/51393
* config/i386/avxintrin.h (_mm256_insert_epi64): Declare second
parameter as long long.
testsuite/ChangeLog:
2011-12-04 Uros Bizjak <ubizjak@gmail.com>
Jérémie Detrey <Jeremie.Detrey@loria.fr>
PR target/51393
* gcc.target/i386/pr51393.c: New test.
From-SVN: r181986
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targeting 10.7 or later.
2011-12-03 Jack Howarth <howarth@bromo.med.uc.edu>
* config/darwin10.h (LINK_GCC_C_SEQUENCE_SPEC):
Pass -no_pie for non-PIC code when targeting 10.7 or later.
From-SVN: r181982
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gcc:
* config/darwin.h (STARTFILE_SPEC): Do not use -lbundle1.o when
Darwin >= 10.
(DARWIN_DYLIB1_SPEC): Do not use -ldylib1.10.5.o when Darwin >= 10.
(DARWIN_CRT1_SPEC): Use -lcrt1.10.6.o when Darwin >= 10.
From-SVN: r181974
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* config/arm/arm.h (LIBCALL_VALUE, FUNCTION_VALUE_REGNO_P): Remove.
* config/arm/arm-protos.h (aapcs_libcall_value): Remove.
* config/arm/arm.c (TARGET_FUNCTION_VALUE_REGNO_P): Define.
(arm_libcall_value_1, arm_function_value_regno_p): New function.
(arm_function_value, arm_libcall_value): Use arm_libcall_value_1.
(aapcs_libcall_value): Make static.
(arm_libcall_value): Add static qualifier.
From-SVN: r181965
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compiled with -mavx2 on sde.)
PR target/51387
* config/i386/sse.md (mul<mode>3 with VI1_AVX2 iterator): For
V32QImode use { 0,2,..,14,32,34,..,46,16,18,..,30,48,50,..,62 }
permutation instead of extract even permutation.
From-SVN: r181951
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* config/ia64/ia64.h (PRINT_OPERAND, PRINT_OPERAND_ADDRESS,
PRINT_OPERAND_PUNCT_VALID_P): Remove macros.
* config/ia64/ia64-protos.h (ia64_print_operand,
ia64_print_operand_address): Remove.
* config/ia64/ia64.c (TARGET_PRINT_OPERAND,
TARGET_PRINT_OPERAND_ADDRESS, TARGET_PRINT_OPERAND_PUNCT_VALID_P):
Define.
(ia64_print_operand_punct_valid_p): New function.
(ia64_print_operand, ia64_print_operand_address): Make static.
From-SVN: r181932
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PR 51390
From-SVN: r181930
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