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* PR middle-end/20983jakub2007-12-0647-124/+78
* 2007-12-06 Andreas Krebbel <krebbel1@de.ibm.com>krebbel2007-12-062-0/+28
* PR target/34312uros2007-12-051-6/+7
* * config/spu/spu.h (ASM_FORMAT_PRIVATE_NAME): Remove; use default.bje2007-12-041-4/+0
* PR33713aldyh2007-12-032-7/+2
* * config/bfin/bfin.h (TARGET_CPU_CPP_BUILTINS): Define __FDPIC__ asbernds2007-12-031-1/+4
* gcc/sam2007-12-021-1/+1
* * config/vax/vax.h (ASM_FORMAT_PRIVATE_NAME): Remove. Use default.bje2007-11-301-8/+0
* PR target/32130jakub2007-11-292-4/+4
* gcc/rsandifo2007-11-281-3/+3
* 2007-11-27 H.J. Lu <hongjiu.lu@intel.com>hjl2007-11-281-2/+5
* * config/i386/linux.h (CRT_GET_RFIB_DATA): Add Intel syntax inlinerask2007-11-283-6/+9
* * config/rs6000/aix64.opt (maix64): Add Negative(maix32).bje2007-11-271-2/+2
* * config/avr/avr.c (avr_mcu_types): Add atmega32hvb.aesok2007-11-273-0/+4
* PR target/34225jakub2007-11-271-4/+3
* 2007-11-27 Andreas Krebbel <krebbel1@de.ibm.com>krebbel2007-11-271-1/+1
* 2007-11-27 Andreas Krebbel <krebbel1@de.ibm.com>krebbel2007-11-271-7/+7
* * config/bfin/elf.h (SUBTARGET_DRIVER_SELF_SPECS): New macro.bernds2007-11-271-0/+4
* * config/rs6000/sysv4.opt (m32): Add Negative(m64).bje2007-11-272-4/+4
* Fix PR 34077meissner2007-11-261-24/+38
* * config/avr/avr.c (avr_mcu_types): Add atmega1284p.aesok2007-11-263-0/+4
* PR target/34215uros2007-11-261-12/+20
* PR target/34174rask2007-11-261-36/+12
* * config/mn10300/mn10300.md: (call_internal): Remove mode onnickc2007-11-261-5/+9
* gcc/rsandifo2007-11-261-1/+1
* * config/mmix/mmix.c (mmix_encode_section_info): Remove duplicatehp2007-11-221-1/+0
* PR target/33947jakub2007-11-221-6/+6
* * config/sh/sh.md (divsi_inv_m3): Handle zero dividendkkojima2007-11-221-0/+6
* * config/i386/i386.h (TARGET_CPU_CPP_BUILTINS): Change checkinguros2007-11-222-109/+118
* * config/mmix/mmix.c (mmix_encode_section_info): Use alloca tohp2007-11-221-6/+3
* PR target/34155kkojima2007-11-212-25/+43
* * config/mips/mips.c (mips_file_start): Add support forths2007-11-201-1/+3
* * config/spu/spu_mfcio.h: Fix typo.bje2007-11-201-1/+1
* * config/spu/mfc_tag_release.c: New file.bje2007-11-207-2/+362
* * config/rs6000/rs6000.c (invalid_e500_subreg,bergner2007-11-192-39/+59
* * config/bfin/bfin.c (must_save_p): New function, mostly broken out ofbernds2007-11-191-96/+175
* Inlined floatunssidf2 and floatunsdidf2saliu2007-11-161-25/+132
* * config/avr/avr.c (avr_mcu_types): Add attiny88.denisc2007-11-153-0/+4
* * config/spu/spu-protos.h (legitimate_const): Remove prototype.uweigand2007-11-152-27/+25
* * config/spu/spu.c (spu_emit_branch_or_set): Remove PROCESSOR_CELLbje2007-11-152-67/+166
* 2007-11-14 David Daney <ddaney@avtrex.com>daney2007-11-151-2/+4
* PR target/33923ebotcazou2007-11-141-3/+7
* * config/i386/i386.h (TARGET_CPU_DEFAULT_*): Substitute with ...uros2007-11-143-31/+55
* * global.c (rest_of_handle_global_alloc): Fix comment typos.rask2007-11-141-2/+2
* make ix86_sse5_valid_op_p adhere to GNU coding stylemeissner2007-11-141-1/+2
* * config/xtensa/unwind-dw2-xtensa.c: New.bwilson2007-11-135-4/+633
* 2007-11-12 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>dwarak2007-11-122-12/+15
* gcc/rsandifo2007-11-121-4/+36
* * config/xtensa/xtensa.c (xtensa_expand_prologue): Remove firstbwilson2007-11-082-7/+6
* PR target/33774dannysmith2007-11-081-1/+5
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