delta/gcc.git - gcc.gnu.org: git/gcc.git

	Commit message (Expand)	Author	Age	Files	Lines
*	Merge remote-tracking branch 'origin/gcc-4_6-branch' into hjl/x32/gcc-4_6-branchhjl/x32/gcc-4_6-branch	H.J. Lu	2012-06-26	1	-48/+5
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\| *	2012-06-17 Uros Bizjak <ubizjak@gmail.com>	uros	2012-06-17	1	-1/+1
\| *	PR target/46098	uros	2012-05-14	1	-47/+4
* \|	Merge remote-tracking branch 'origin/gcc-4_6-branch' into hjl/x32/gcc-4_6-branch	H.J. Lu	2012-04-13	1	-6/+6
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\| *	* config/i386/sse.md (avx_h<plusminus_insn>v4df3): Fix results	uros	2012-03-29	1	-5/+5
\| *	PR target/52736	jakub	2012-03-28	1	-1/+1
* \|	Replace :DI with :P.	H.J. Lu	2011-11-10	1	-1/+1
* \|	Properly use word_mode and Pmode.	H.J. Lu	2011-11-08	1	-2/+2
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*	PR target/50875	uros	2011-10-27	1	-6/+5
*	PR target/50788	uros	2011-10-23	1	-2/+1
*	PR target/50464	uros	2011-09-22	1	-4/+4
*	* config/i386/sse.md (vec_extract_lo_<mode>): Prevent both	uros	2011-08-27	1	-6/+6
*	PR target/50202	uros	2011-08-27	1	-0/+6
*	2011-06-29 Harsha Jagasia <harsha.jagasia@amd.com>	hjagasia	2011-06-29	1	-2/+2
*	Don't assert unaligned 256bit load/store.	cfang	2011-06-28	1	-24/+2
*	Split 32-byte AVX unaligned load/store.	cfang	2011-06-28	1	-5/+37
*	PR target/49411	jakub	2011-06-18	1	-8/+8
*	* config/i386/sse.md (vec_dupv4sf): Correct mode of forced register.	uros	2011-06-11	1	-2/+12
*	Fix fma4_fmsubadd and fma4_fmaddsub mode suffixes.	qneill	2011-05-31	1	-2/+2
*	PR target/49133	uros	2011-05-24	1	-8/+6
*	Properly handle 256bit load cast.	hjl	2011-05-18	1	-4/+5
*	* config/i386/i386.md (*movdi_internal_rex64) <TYPE_SSEMOV>:	uros	2011-05-04	1	-4/+5
*	PR target/48605	jakub	2011-04-15	1	-2/+20
*	* config/i386/sse.md: Update copyright year.	uros	2011-04-07	1	-26/+47
*	Backport from mainline	abel	2011-04-01	1	-0/+5
*	* config/i386/sse.md (*avx_pmaddubsw128): Fix mode of VEC_SELECT RTX.	uros	2011-03-03	1	-8/+8
*	Correct mask operand for AVX mask load/store.	hjl	2011-01-17	1	-2/+2
*	PR target/46880	jakub	2010-12-21	1	-2/+2
*	2010-12-08 Iain Sandoe <iains@gcc.gnu.org>	mrs	2010-12-08	1	-2/+2
*	i386: Convert from -mfused-madd to -ffp-contract.	rth	2010-11-12	1	-94/+4
*	2010-11-04 Richard Guenther <rguenther@suse.de>	rguenth	2010-11-04	1	-1/+28
*	Partially revert:	uros	2010-10-28	1	-10/+10
*	PR target/46153	uros	2010-10-28	1	-16/+76
*	Add -mvzeroupper to x86.	hjl	2010-10-27	1	-23/+5
*	PR target/46144	rth	2010-10-23	1	-10/+35
*	Use ABS/NEG+USE for vector modes as well.	rth	2010-10-22	1	-0/+18
*	Implementation of the pipeline description for Bulldozer (bdver1)	cfang	2010-10-22	1	-10/+34
*	PR target/46098	uros	2010-10-22	1	-4/+47
*	Add V8SI and V4DI to ssescalarmodesuffix.	hjl	2010-10-21	1	-2/+2
*	Correct reduc_splus_v8sf and reduc_splus_v4df.	hjl	2010-10-20	1	-3/+6
*	Add patterns for FMA3.	rth	2010-10-19	1	-60/+217
*	Simplify FMA4 patterns with FMA rtx code.	rth	2010-10-19	1	-635/+177
*	PR target/46051	uros	2010-10-17	1	-28/+24
*	Addd 256bit AVX vectorizer patterns.	hjl	2010-10-13	1	-42/+284
*	* config/i386/sse.md (*avx_<umaxmin:code><mode>3):	uros	2010-09-28	1	-7/+20
*	* config/i386/i386.md: Remove unneeded empty conditions and	uros	2010-09-16	1	-71/+48
*	* config/i386/sse.md (extsuffix): New code attribute.	uros	2010-08-28	1	-168/+32
*	PR target/41484	uros	2010-08-27	1	-212/+12
*	PR target/45336	jakub	2010-08-20	1	-8/+22
*	PR target/45142	uros	2010-08-01	1	-6/+7