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* PR target/47989uros2011-10-201-1/+1
* * i386/i386.opt (recip_mask, recip_mask_explicit,matz2011-10-061-0/+13
* Add BMI2 support.hjl2011-08-231-0/+4
* Add -mavx2.hjl2011-08-181-0/+4
* Change ix86_isa_flags to HOST_WIDE_INT.hjl2011-08-181-3/+3
* Add -mlzcnt.hjl2011-08-011-0/+4
* 2011-07-12 Harsha Jagasia <harsha.jagasia@amd.com>hjagasia2011-07-121-1/+1
* Initial x32 support.hjl2011-07-071-1/+5
* Auto-vectorizer generates 128-bit AVX insns by default for bdver1.cfang2011-06-291-1/+1
* * opts-common.c (opt_enum_arg_to_value): New.jsm282011-05-161-5/+26
* * config/i386/i386-opts.h: New.jsm282011-05-131-17/+112
* Split 32-byte AVX unaligned load/store.hjl2011-03-271-0/+8
* * config/i386/i386.c (ix86_isa_flags_explicit): Remove.jsm282011-03-221-1/+6
* Add Save to -mavx and -mfma.hjl2011-03-171-2/+2
* Introduce flag -mprefer-avx128 for the auto-vectorizer to generate only 128-b...cfang2011-03-041-0/+4
* * config/i386/i386.h (CC1_CPU_SPEC_1): Don't handle -msse5.jsm282011-01-141-1/+5
* i386: Convert from -mfused-madd to -ffp-contract.rth2010-11-121-6/+0
* Add support for TBM.spop2010-11-101-0/+4
* Add support for BMI.spop2010-11-101-0/+4
* Add -mvzeroupper to x86.hjl2010-10-271-0/+5
* * optc-gen.awk: Define global_options_set. Don't definejsm282010-10-041-1/+1
* * doc/options.texi (Variable, Var, Init): Update documentationjsm282010-09-291-30/+30
* gcc/testsuite:ro2010-09-281-0/+4
* * doc/options.texi (Variable): Document.jsm282010-09-171-0/+4
* Add -m8bit-idiv for x86.hjl2010-09-161-0/+4
* Dispatch scheduling for AMD Bulldozer processors.spop2010-09-091-0/+5
* * opts.h (struct cl_option): Add warn_message field.jsm282010-09-021-2/+6
* 2010-07-28 Kai Tietz <kai.tietz@onevision.com>ktietz2010-07-281-0/+4
* Support AVX Programming Reference (June, 2010).hjl2010-07-051-0/+12
* Add TARGET_FUSED_MADD to FMA4 insns.spop2009-12-051-0/+6
* 2009-11-04 Harsha Jagasia <harsha.jagasia@amd.com>dwarak2009-11-041-0/+4
* 2009-11-04 Harsha Jagasia <harsha.jagasia@amd.com>dwarak2009-11-041-0/+4
* 2009-09-29 Harsha Jagasia <harsha.jagasia@amd.com>hjagasia2009-09-301-0/+4
* * config/i386/bmmintrin.h: Replace by #error.hubicka2009-08-251-13/+0
* gcc/hjl2009-06-121-0/+4
* gcc/hjl2009-05-211-0/+4
* gcc/hjl2009-03-271-0/+4
* Update Copyright years for files modified in 2008 and/or 2009.jakub2009-02-201-1/+1
* 2008-10-07 H.J. Lu <hongjiu.lu@intel.com>hjl2008-10-071-0/+4
* 2008-09-29 H.J. Lu <hongjiu.lu@intel.com>hjl2008-09-301-0/+4
* 2008-08-28 H.J. Lu <hongjiu.lu@intel.com>hjl2008-08-281-0/+8
* 2008-07-30 Joey Ye <joey.ye@intel.com>hjl2008-07-301-1/+9
* Add ability to set target options (ix86 only) and optimization options on a f...meissner2008-07-231-64/+99
* PR target/36079uros2008-05-231-0/+4
* gcc/hjl2008-04-041-0/+8
* Add AMD SSE5 support; Add iterator over function arguments; Add stdarg_p, pro...meissner2007-09-131-0/+10
* 2007-08-30 Richard Guenther <rguenther@suse.de>rguenth2007-08-301-0/+4
* * config/host-hpux.c: Change copyright header to refer to version 3 of the GNUnickc2007-08-021-4/+3
* PR middle-end/31723uros2007-06-161-0/+4
* 2007-05-31 H.J. Lu <hongjiu.lu@intel.com>hjl2007-05-311-0/+12
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